[bsp] support using debuger download, runing after reboot
This commit is contained in:
parent
68f13f5d92
commit
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@ -45,20 +45,20 @@
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** ###################################################################
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** ###################################################################
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*/
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*/
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#define m_interrupts_start 0x60002000
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#define m_text_start 0x60002000
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#define m_interrupts_size 0x00000400
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#define m_text_size 0x1F7FE000
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#define m_text_start 0x60002400
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#define m_text_size 0x1F7FDC00
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#define m_data_start 0x20000000
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#define m_data_start 0x20000000
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#define m_data_size 0x00020000
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#define m_data_size 0x00020000
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#define m_ncache_start 0x81E00000
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#define m_ncache_size 0x00200000
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/* Sizes */
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/* Sizes */
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#if (defined(__stack_size__))
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#if (defined(__stack_size__))
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#define Stack_Size __stack_size__
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#define Stack_Size __stack_size__
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#else
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#else
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#define Stack_Size 0x0400
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#define Stack_Size 0x1000
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#endif
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#endif
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#if (defined(__heap_size__))
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#if (defined(__heap_size__))
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@ -69,23 +69,22 @@
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LR_m_text m_text_start m_text_size { ; load region size_region
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LR_m_text m_text_start m_text_size { ; load region size_region
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ER_m_text m_text_start m_text_size { ; load address = execution address
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ER_m_text m_text_start m_text_size { ; load address = execution address
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* (RESET,+FIRST)
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* (InRoot$$Sections)
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* (InRoot$$Sections)
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.ANY (+RO)
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.ANY (+RO)
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}
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}
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RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
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RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
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.ANY (+RW +ZI)
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.ANY (+RW +ZI)
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* (NonCacheable.init)
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* (NonCacheable)
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}
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}
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ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
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ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
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}
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}
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ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
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ARM_LIB_STACK +0 EMPTY Stack_Size { ; Stack region growing down
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}
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}
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}
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LR_m_interrupts m_interrupts_start m_interrupts_size {
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RW_m_ncache m_ncache_start m_ncache_size { ; ncache RW data
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VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
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* (NonCacheable.init)
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* (RESET,+FIRST)
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* (NonCacheable)
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}
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}
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}
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}
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@ -0,0 +1,45 @@
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/*
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* Copyright 2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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FUNC void Setup (void) {
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SP = _RDWORD(0x60002000); // Setup Stack Pointer
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PC = _RDWORD(0x60002004); // Setup Program Counter
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_WDWORD(0xE000ED08, 0x60002000); // Setup Vector Table Offset Register
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}
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FUNC void OnResetExec (void) { // executes upon software RESET
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Setup(); // Setup for Running
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}
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LOAD %L INCREMENTAL // Download
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Setup(); // Setup for Running
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// g, main
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@ -53,14 +53,33 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
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/* Specify the memory areas */
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/* Specify the memory areas */
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MEMORY
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MEMORY
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{
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{
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m_boot_data (RX) : ORIGIN = 0x60000000, LENGTH = 0x00000400
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m_image_vertor_table (RX) : ORIGIN = 0x60001000, LENGTH = 0x00000400
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m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400
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m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400
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m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x1F7FDC00
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m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x1F7FDC00
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m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
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m_itcm (RW) : ORIGIN = 0x00000000, LENGTH = 0x00020000
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m_dtcm (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
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m_ocram (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000
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m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000
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m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000
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}
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}
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/* Define output sections */
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/* Define output sections */
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SECTIONS
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SECTIONS
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{
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{
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.boot_data :
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{
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KEEP(*(.bootdata))
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} > m_boot_data
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.image_vertor_table :
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{
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KEEP(*(.ivt))
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} > m_image_vertor_table
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/* The startup code goes first into internal RAM */
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/* The startup code goes first into internal RAM */
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.interrupts :
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.interrupts :
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{
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{
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@ -87,6 +106,23 @@ SECTIONS
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KEEP (*(.init))
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KEEP (*(.init))
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KEEP (*(.fini))
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KEEP (*(.fini))
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. = ALIGN(4);
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. = ALIGN(4);
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/* section information for finsh shell */
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. = ALIGN(4);
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__fsymtab_start = .;
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KEEP(*(FSymTab))
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__fsymtab_end = .;
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. = ALIGN(4);
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__vsymtab_start = .;
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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. = ALIGN(4);
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/* section information for initial. */
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. = ALIGN(4);
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__rt_init_start = .;
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KEEP(*(SORT(.rti_fn*)))
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__rt_init_end = .;
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} > m_text
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} > m_text
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.ARM.extab :
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.ARM.extab :
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@ -173,7 +209,7 @@ SECTIONS
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KEEP(*(.jcr*))
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KEEP(*(.jcr*))
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. = ALIGN(4);
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. = ALIGN(4);
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__data_end__ = .; /* define a global symbol at data end */
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__data_end__ = .; /* define a global symbol at data end */
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} > m_data
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} > m_dtcm
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__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
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__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
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.ncache.init : AT(__NDATA_ROM)
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.ncache.init : AT(__NDATA_ROM)
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*(NonCacheable.init)
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*(NonCacheable.init)
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. = ALIGN(4);
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. = ALIGN(4);
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__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
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__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
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} > m_data
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} > m_dtcm
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. = __noncachedata_init_end__;
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. = __noncachedata_init_end__;
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.ncache :
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.ncache :
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{
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{
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*(NonCacheable)
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*(NonCacheable)
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. = ALIGN(4);
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. = ALIGN(4);
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__noncachedata_end__ = .; /* define a global symbol at ncache data end */
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__noncachedata_end__ = .; /* define a global symbol at ncache data end */
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} > m_data
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} > m_dtcm
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__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
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__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
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text_end = ORIGIN(m_text) + LENGTH(m_text);
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text_end = ORIGIN(m_text) + LENGTH(m_text);
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. = ALIGN(4);
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. = ALIGN(4);
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__bss_end__ = .;
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__bss_end__ = .;
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__END_BSS = .;
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__END_BSS = .;
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} > m_data
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} > m_dtcm
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.heap :
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{
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. = ALIGN(8);
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__end__ = .;
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PROVIDE(end = .);
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__HeapBase = .;
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. += HEAP_SIZE;
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__HeapLimit = .;
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__heap_limit = .; /* Add for _sbrk */
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} > m_data
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.stack :
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.stack :
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{
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{
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. = ALIGN(8);
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. = ALIGN(8);
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stack_start = .;
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. += STACK_SIZE;
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. += STACK_SIZE;
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} > m_data
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stack_end = .;
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heap_start = .;
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} > m_dtcm
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/* Initializes stack on the end of block */
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/* Initializes stack on the end of block */
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__StackTop = ORIGIN(m_data) + LENGTH(m_data);
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__StackTop = stack_end;
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__StackLimit = __StackTop - STACK_SIZE;
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PROVIDE(__stack = __StackTop);
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PROVIDE(__stack = __StackTop);
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.ARM.attributes 0 : { *(.ARM.attributes) }
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.ARM.attributes 0 : { *(.ARM.attributes) }
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ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
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}
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}
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@ -54,8 +54,14 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
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MEMORY
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MEMORY
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{
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{
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m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
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m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
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m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
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m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x00020000
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m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
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/* m_itcm (RW) : ORIGIN = 0x00000000, LENGTH = 0x00020000 */
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m_dtcm (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
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/* m_ocram (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000 */
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/* m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000 */
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/* m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000 */
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}
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}
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/* Define output sections */
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/* Define output sections */
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@ -87,6 +93,23 @@ SECTIONS
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KEEP (*(.init))
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KEEP (*(.init))
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KEEP (*(.fini))
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KEEP (*(.fini))
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. = ALIGN(4);
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. = ALIGN(4);
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/* section information for finsh shell */
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. = ALIGN(4);
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__fsymtab_start = .;
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KEEP(*(FSymTab))
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__fsymtab_end = .;
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. = ALIGN(4);
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__vsymtab_start = .;
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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. = ALIGN(4);
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/* section information for initial. */
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. = ALIGN(4);
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__rt_init_start = .;
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KEEP(*(SORT(.rti_fn*)))
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__rt_init_end = .;
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} > m_text
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} > m_text
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.ARM.extab :
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.ARM.extab :
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@ -173,7 +196,7 @@ SECTIONS
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KEEP(*(.jcr*))
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KEEP(*(.jcr*))
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. = ALIGN(4);
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. = ALIGN(4);
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__data_end__ = .; /* define a global symbol at data end */
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__data_end__ = .; /* define a global symbol at data end */
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} > m_data
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} > m_dtcm
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__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
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__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
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.ncache.init : AT(__NDATA_ROM)
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.ncache.init : AT(__NDATA_ROM)
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@ -182,14 +205,14 @@ SECTIONS
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*(NonCacheable.init)
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*(NonCacheable.init)
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. = ALIGN(4);
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. = ALIGN(4);
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__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
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__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
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} > m_data
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} > m_dtcm
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. = __noncachedata_init_end__;
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. = __noncachedata_init_end__;
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.ncache :
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.ncache :
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{
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{
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*(NonCacheable)
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*(NonCacheable)
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. = ALIGN(4);
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. = ALIGN(4);
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__noncachedata_end__ = .; /* define a global symbol at ncache data end */
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__noncachedata_end__ = .; /* define a global symbol at ncache data end */
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} > m_data
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} > m_dtcm
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__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
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__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
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text_end = ORIGIN(m_text) + LENGTH(m_text);
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text_end = ORIGIN(m_text) + LENGTH(m_text);
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@ -209,32 +232,21 @@ SECTIONS
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. = ALIGN(4);
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. = ALIGN(4);
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__bss_end__ = .;
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__bss_end__ = .;
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__END_BSS = .;
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__END_BSS = .;
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} > m_data
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} > m_dtcm
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.heap :
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{
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. = ALIGN(8);
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__end__ = .;
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PROVIDE(end = .);
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__HeapBase = .;
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. += HEAP_SIZE;
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__HeapLimit = .;
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__heap_limit = .; /* Add for _sbrk */
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} > m_data
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.stack :
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.stack :
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{
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{
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. = ALIGN(8);
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. = ALIGN(8);
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stack_start = .;
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. += STACK_SIZE;
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. += STACK_SIZE;
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} > m_data
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stack_end = .;
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heap_start = .;
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} > m_dtcm
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|
|
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/* Initializes stack on the end of block */
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/* Initializes stack on the end of block */
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__StackTop = ORIGIN(m_data) + LENGTH(m_data);
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__StackTop = stack_end;
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__StackLimit = __StackTop - STACK_SIZE;
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PROVIDE(__stack = __StackTop);
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PROVIDE(__stack = __StackTop);
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.ARM.attributes 0 : { *(.ARM.attributes) }
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.ARM.attributes 0 : { *(.ARM.attributes) }
|
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ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
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}
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}
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@ -36,6 +36,10 @@
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/*****************************************************************************/
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/*****************************************************************************/
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/* Version: GCC for ARM Embedded Processors */
|
/* Version: GCC for ARM Embedded Processors */
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
|
#define __STARTUP_INITIALIZE_NONCACHEDATA
|
||||||
|
#define __STARTUP_CLEAR_BSS
|
||||||
|
|
||||||
.syntax unified
|
.syntax unified
|
||||||
.arch armv7-m
|
.arch armv7-m
|
||||||
|
|
||||||
|
|
|
@ -47,14 +47,23 @@
|
||||||
define symbol m_interrupts_start = 0x60002000;
|
define symbol m_interrupts_start = 0x60002000;
|
||||||
define symbol m_interrupts_end = 0x600023FF;
|
define symbol m_interrupts_end = 0x600023FF;
|
||||||
|
|
||||||
define symbol m_text_start = 0x60002400;
|
define symbol m_itcm_start = 0x00000000;
|
||||||
define symbol m_text_end = 0x7F7FFFFF;
|
define symbol m_itcm_end = 0x0001FFFF;
|
||||||
|
|
||||||
define symbol m_data_start = 0x20000000;
|
define symbol m_spiflash_start = 0x60002400;
|
||||||
define symbol m_data_end = 0x2001FFFF;
|
define symbol m_spiflash_end = 0x7F7FFFFF;
|
||||||
|
|
||||||
define symbol m_data2_start = 0x20200000;
|
define symbol m_dtcm_start = 0x20000000;
|
||||||
define symbol m_data2_end = 0x2023FFFF;
|
define symbol m_dtcm_end = 0x2001FFFF;
|
||||||
|
|
||||||
|
define symbol m_ocram_start = 0x20200000;
|
||||||
|
define symbol m_ocram_end = 0x2023FFFF;
|
||||||
|
|
||||||
|
define symbol m_sdram_start = 0x80000000;
|
||||||
|
define symbol m_sdram_end = 0x81DFFFFF;
|
||||||
|
|
||||||
|
define symbol m_ncache_start = 0x81E00000;
|
||||||
|
define symbol m_ncache_end = 0x81FFFFFF;
|
||||||
|
|
||||||
/* Sizes */
|
/* Sizes */
|
||||||
if (isdefinedsymbol(__stack_size__)) {
|
if (isdefinedsymbol(__stack_size__)) {
|
||||||
|
@ -75,11 +84,13 @@ define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0;
|
||||||
|
|
||||||
define memory mem with size = 4G;
|
define memory mem with size = 4G;
|
||||||
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
|
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
|
||||||
| mem:[from m_text_start to m_text_end];
|
| mem:[from m_spiflash_start to m_spiflash_end];
|
||||||
|
|
||||||
define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
|
define region ITCM_region = mem:[from m_itcm_start to m_itcm_end];
|
||||||
define region DATA2_region = mem:[from m_data2_start to m_data2_end];
|
define region DTCM_region = mem:[from m_dtcm_start to m_dtcm_end];
|
||||||
define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
|
define region OCRAM_region = mem:[from m_ocram_start to m_ocram_end];
|
||||||
|
define region NCACHE_region = mem:[from m_ncache_start to m_ncache_end];
|
||||||
|
define region SDRAM_region = mem:[from m_sdram_start to m_sdram_end];
|
||||||
|
|
||||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
||||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
define block HEAP with alignment = 8, size = __size_heap__ { };
|
||||||
|
@ -92,10 +103,14 @@ do not initialize { section .noinit };
|
||||||
|
|
||||||
place at address mem: m_interrupts_start { readonly section .intvec };
|
place at address mem: m_interrupts_start { readonly section .intvec };
|
||||||
|
|
||||||
place in TEXT_region { readonly };
|
keep { section FSymTab };
|
||||||
place in DATA_region { block RW };
|
keep { section VSymTab };
|
||||||
place in DATA_region { block ZI };
|
keep { section .rti_fn* };
|
||||||
place in DATA_region { last block HEAP };
|
|
||||||
place in DATA_region { block NCACHE_VAR };
|
place in TEXT_region { readonly };
|
||||||
place in CSTACK_region { block CSTACK };
|
place in DTCM_region { block RW };
|
||||||
|
place in DTCM_region { block ZI };
|
||||||
|
place in DTCM_region { last block HEAP };
|
||||||
|
place in DTCM_region { block CSTACK };
|
||||||
|
place in NCACHE_region { block NCACHE_VAR };
|
||||||
|
|
||||||
|
|
|
@ -116,6 +116,8 @@ void SystemInit (void) {
|
||||||
SCB_EnableDCache();
|
SCB_EnableDCache();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
extern void rt_lowlevel_init(void);
|
||||||
|
rt_lowlevel_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
/* ----------------------------------------------------------------------------
|
/* ----------------------------------------------------------------------------
|
||||||
|
|
|
@ -8,6 +8,7 @@ cwd = os.path.join(str(Dir('#')), 'drivers')
|
||||||
src = Split("""
|
src = Split("""
|
||||||
board.c
|
board.c
|
||||||
usart.c
|
usart.c
|
||||||
|
hyper_flash_boot.c
|
||||||
drv_sdram.c
|
drv_sdram.c
|
||||||
""")
|
""")
|
||||||
|
|
||||||
|
|
|
@ -31,14 +31,14 @@ const clock_usb_pll_config_t usb1PllConfig = { .loopDivider = 0U };
|
||||||
|
|
||||||
static void BOARD_BootClockGate(void)
|
static void BOARD_BootClockGate(void)
|
||||||
{
|
{
|
||||||
/* Disable all unused peripheral clock */
|
// /* Disable all unused peripheral clock */
|
||||||
CCM->CCGR0 = 0x00C0000FU;
|
// CCM->CCGR0 = 0x00C0000FU;
|
||||||
CCM->CCGR1 = 0x30000000U;
|
// CCM->CCGR1 = 0x30000000U;
|
||||||
CCM->CCGR2 = 0x003F0030U;
|
// CCM->CCGR2 = 0x003F0030U;
|
||||||
CCM->CCGR3 = 0xF0000330U;
|
// CCM->CCGR3 = 0xF0000330U;
|
||||||
CCM->CCGR4 = 0x0000FF3CU;
|
// CCM->CCGR4 = 0x0000FF3CU;
|
||||||
CCM->CCGR5 = 0xF000330FU;
|
// CCM->CCGR5 = 0xF000330FU;
|
||||||
CCM->CCGR6 = 0x00FC0300U;
|
// CCM->CCGR6 = 0x00FC0300U;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void BOARD_BootClockRUN(void)
|
static void BOARD_BootClockRUN(void)
|
||||||
|
|
|
@ -0,0 +1,93 @@
|
||||||
|
/*
|
||||||
|
* File : clock.c
|
||||||
|
* This file is part of RT-Thread RTOS
|
||||||
|
* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License along
|
||||||
|
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||||
|
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2017-12-05 Tanek first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#if defined (__ICCARM__ )
|
||||||
|
#define RT_AT_ADDR(__ADDR) @ __ADDR
|
||||||
|
#elif defined ( __GNUC__ )
|
||||||
|
#define RT_AT_ADDR(__ADDR) //__attribute__((at(__ADDR)))
|
||||||
|
#elif defined ( __CC_ARM )
|
||||||
|
#define RT_AT_ADDR(__ADDR) __attribute__((at(__ADDR)))
|
||||||
|
#else
|
||||||
|
#error Not a valid compiler/linker for m_dfu_settings placement.
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#if defined ( __GNUC__ )
|
||||||
|
// enter serial download mode, and run command:
|
||||||
|
// finsh /> mem_dump(0x60000000, 512)
|
||||||
|
RT_USED static const uint32_t boot_data[] __attribute__((section (".bootdata"))) = {
|
||||||
|
0x42464346, 0x56010400, 0x00000000, 0x03030303, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000059, 0x01080800, 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000000F, 0x0001000F,
|
||||||
|
0x8B1887A0, 0xA7048F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87708700,
|
||||||
|
0x8B1887A0, 0xB70B8F10, 0x0000A704, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700,
|
||||||
|
0x87008700, 0x87558700, 0x87028700, 0x87558700, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700,
|
||||||
|
0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700,
|
||||||
|
0x8B188700, 0x87008F10, 0x00008730, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87A08700,
|
||||||
|
0x8B188700, 0xA3808F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700,
|
||||||
|
0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700,
|
||||||
|
0x87008700, 0x87AA8700, 0x87058700, 0x87108700, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000000, 0x00000102, 0x00000302, 0x00000504, 0x00000902, 0x00000B04, 0x00000000, 0x00000000,
|
||||||
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000200, 0x00040000, 0x00000008, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
};
|
||||||
|
|
||||||
|
// finsh /> mem_dump(0x60001000, 16)
|
||||||
|
RT_USED static const uint32_t image_vertor_table[] __attribute__((section (".ivt"))) = {
|
||||||
|
0x412000D1, 0x60002000, 0x00000000, 0x00000000, 0x60001020, 0x60001000, 0x00000000, 0x00000000,
|
||||||
|
0x60000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
};
|
||||||
|
#else
|
||||||
|
|
||||||
|
// enter serial download mode, and run command:
|
||||||
|
// finsh /> mem_dump(0x60000000, 512)
|
||||||
|
RT_USED static const uint32_t boot_data[] RT_AT_ADDR(0x60000000u) = {
|
||||||
|
0x42464346, 0x56010400, 0x00000000, 0x03030303, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000059, 0x01080800, 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000000F, 0x0001000F,
|
||||||
|
0x8B1887A0, 0xA7048F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87708700,
|
||||||
|
0x8B1887A0, 0xB70B8F10, 0x0000A704, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700,
|
||||||
|
0x87008700, 0x87558700, 0x87028700, 0x87558700, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700,
|
||||||
|
0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700,
|
||||||
|
0x8B188700, 0x87008F10, 0x00008730, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87A08700,
|
||||||
|
0x8B188700, 0xA3808F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700,
|
||||||
|
0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700,
|
||||||
|
0x87008700, 0x87AA8700, 0x87058700, 0x87108700, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000000, 0x00000102, 0x00000302, 0x00000504, 0x00000902, 0x00000B04, 0x00000000, 0x00000000,
|
||||||
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000200, 0x00040000, 0x00000008, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
};
|
||||||
|
|
||||||
|
// finsh /> mem_dump(0x60001000, 16)
|
||||||
|
RT_USED static const uint32_t image_vertor_table[] RT_AT_ADDR(0x60001000u) = {
|
||||||
|
0x412000D1, 0x60002000, 0x00000000, 0x00000000, 0x60001020, 0x60001000, 0x00000000, 0x00000000,
|
||||||
|
0x60000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||||
|
};
|
||||||
|
#endif
|
|
@ -41,16 +41,18 @@ if PLATFORM == 'gcc':
|
||||||
STRIP = PREFIX + 'strip'
|
STRIP = PREFIX + 'strip'
|
||||||
|
|
||||||
DEVICE = ' -std=c99 -mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections'
|
DEVICE = ' -std=c99 -mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections'
|
||||||
CFLAGS = DEVICE + ' -g -Wall -DUSE_HAL_DRIVER -D__ASSEMBLY__ -D__FPU_USED -eentry'
|
CFLAGS = DEVICE + ' -g -Wall -DUSE_HAL_DRIVER -D__ASSEMBLY__ -D__FPU_PRESENT -eentry'
|
||||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||||
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=imxrt1052_sdram.map,-cref,-u,Reset_Handler -T imxrt1052_sdram.ld'
|
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=imxrt1052_sdram.map,-cref,-u,Reset_Handler -T ./Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld'
|
||||||
|
|
||||||
CPATH = ''
|
CPATH = ''
|
||||||
LPATH = ''
|
LPATH = ''
|
||||||
|
|
||||||
|
CFLAGS += ' -gdwarf-2'
|
||||||
|
AFLAGS += ' -gdwarf-2'
|
||||||
|
|
||||||
if BUILD == 'debug':
|
if BUILD == 'debug':
|
||||||
CFLAGS += ' -O0 -gdwarf-2'
|
CFLAGS += ' -O0'
|
||||||
AFLAGS += ' -gdwarf-2'
|
|
||||||
else:
|
else:
|
||||||
CFLAGS += ' -O2 -Os'
|
CFLAGS += ' -O2 -Os'
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue