update libcpu lpc2478.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1852 bbd45198-f89e-11dd-88c7-29a3b14d5316
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wuyangyong
parent
cd49d73535
commit
f1b07348c2
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@ -10,6 +10,7 @@
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; * Change Logs:
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; * Date Author Notes
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; * 2009-01-20 Bernard first version
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; * 2011-07-22 Bernard added thumb mode porting
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; */
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NOINT EQU 0xc0 ; disable interrupt in psr
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@ -1,389 +0,0 @@
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/*
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* File : serial.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://openlab.rt-thread.com/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2006-08-23 Bernard first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "LPC24xx.h"
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#include "board.h"
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/* serial hardware register */
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#define REG8(d) (*((volatile unsigned char *)(d)))
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#define REG32(d) (*((volatile unsigned long *)(d)))
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#define UART_RBR(base) REG8(base + 0x00)
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#define UART_THR(base) REG8(base + 0x00)
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#define UART_IER(base) REG32(base + 0x04)
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#define UART_IIR(base) REG32(base + 0x08)
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#define UART_FCR(base) REG8(base + 0x08)
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#define UART_LCR(base) REG8(base + 0x0C)
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#define UART_MCR(base) REG8(base + 0x10)
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#define UART_LSR(base) REG8(base + 0x14)
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#define UART_MSR(base) REG8(base + 0x18)
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#define UART_SCR(base) REG8(base + 0x1C)
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#define UART_DLL(base) REG8(base + 0x00)
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#define UART_DLM(base) REG8(base + 0x04)
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#define UART_ACR(base) REG32(base + 0x20)
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#define UART_FDR(base) REG32(base + 0x28)
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#define UART_TER(base) REG8(base + 0x30)
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/* LPC serial device */
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struct rt_lpcserial
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{
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/* inherit from device */
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struct rt_device parent;
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rt_uint32_t hw_base;
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rt_uint32_t irqno;
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rt_uint32_t baudrate;
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/* reception field */
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rt_uint16_t save_index, read_index;
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rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
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};
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#ifdef RT_USING_UART1
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struct rt_lpcserial serial1;
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#endif
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#ifdef RT_USING_UART2
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struct rt_lpcserial serial2;
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#endif
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void rt_hw_serial_init(void);
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#define U0PINS 0x00000005
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void rt_hw_uart_isr(struct rt_lpcserial* lpc_serial)
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{
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UNUSED rt_uint32_t iir;
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RT_ASSERT(lpc_serial != RT_NULL)
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if (UART_LSR(lpc_serial->hw_base) & 0x01)
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{
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rt_base_t level;
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while (UART_LSR(lpc_serial->hw_base) & 0x01)
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{
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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/* read character */
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lpc_serial->rx_buffer[lpc_serial->save_index] =
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UART_RBR(lpc_serial->hw_base);
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lpc_serial->save_index ++;
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if (lpc_serial->save_index >= RT_UART_RX_BUFFER_SIZE)
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lpc_serial->save_index = 0;
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/* if the next position is read index, discard this 'read char' */
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if (lpc_serial->save_index == lpc_serial->read_index)
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{
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lpc_serial->read_index ++;
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if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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lpc_serial->read_index = 0;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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}
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/* invoke callback */
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if(lpc_serial->parent.rx_indicate != RT_NULL)
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{
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lpc_serial->parent.rx_indicate(&lpc_serial->parent, 1);
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}
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}
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/* clear interrupt source */
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iir = UART_IIR(lpc_serial->hw_base);
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/* acknowledge Interrupt */
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VICVectAddr = 0;
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}
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#ifdef RT_USING_UART1
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void rt_hw_uart_isr_1(int irqno)
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{
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/* get lpc serial device */
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rt_hw_uart_isr(&serial1);
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}
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#endif
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#ifdef RT_USING_UART2
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void rt_hw_uart_isr_2(int irqno)
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{
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/* get lpc serial device */
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rt_hw_uart_isr(&serial2);
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}
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#endif
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/**
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* @addtogroup LPC214x
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*/
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/*@{*/
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static rt_err_t rt_serial_init (rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
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{
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struct rt_lpcserial* lpc_serial;
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lpc_serial = (struct rt_lpcserial*) dev;
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RT_ASSERT(lpc_serial != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* init UART rx interrupt */
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UART_IER(lpc_serial->hw_base) = 0x01;
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/* install ISR */
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if (lpc_serial->irqno == UART0_INT)
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{
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#ifdef RT_USING_UART1
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rt_hw_interrupt_install(lpc_serial->irqno, rt_hw_uart_isr_1, RT_NULL);
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#endif
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}
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else
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{
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#ifdef RT_USING_UART2
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rt_hw_interrupt_install(lpc_serial->irqno, rt_hw_uart_isr_2, RT_NULL);
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#endif
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}
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rt_hw_interrupt_umask(lpc_serial->irqno);
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}
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return RT_EOK;
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}
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static rt_err_t rt_serial_close(rt_device_t dev)
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{
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struct rt_lpcserial* lpc_serial;
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lpc_serial = (struct rt_lpcserial*) dev;
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RT_ASSERT(lpc_serial != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* disable UART rx interrupt */
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UART_IER(lpc_serial->hw_base) = 0x00;
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}
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return RT_EOK;
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}
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static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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return RT_EOK;
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}
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static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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rt_uint8_t* ptr;
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struct rt_lpcserial *lpc_serial = (struct rt_lpcserial*)dev;
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RT_ASSERT(lpc_serial != RT_NULL);
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/* point to buffer */
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ptr = (rt_uint8_t*) buffer;
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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while (size)
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{
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/* interrupt receive */
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rt_base_t level;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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if (lpc_serial->read_index != lpc_serial->save_index)
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{
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*ptr = lpc_serial->rx_buffer[lpc_serial->read_index];
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lpc_serial->read_index ++;
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if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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lpc_serial->read_index = 0;
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}
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else
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{
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/* no data in rx buffer */
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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break;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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ptr ++; size --;
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}
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return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
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}
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else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
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{
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/* not support right now */
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RT_ASSERT(0);
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}
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/* polling mode */
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while (size && (UART_LSR(lpc_serial->hw_base) & 0x01))
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{
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/* Read Character */
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*ptr = UART_RBR(lpc_serial->hw_base);
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ptr ++;
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size --;
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}
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return (rt_size_t)ptr - (rt_size_t)buffer;
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}
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static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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{
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struct rt_lpcserial* lpc_serial;
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char *ptr;
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lpc_serial = (struct rt_lpcserial*) dev;
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if (dev->flag & RT_DEVICE_FLAG_INT_TX)
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{
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/* not support */
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RT_ASSERT(0);
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}
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else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
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{
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/* not support */
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RT_ASSERT(0);
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}
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/* polling write */
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ptr = (char *)buffer;
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if (dev->flag & RT_DEVICE_FLAG_STREAM)
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{
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/* stream mode */
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while (size)
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{
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if (*ptr == '\n')
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{
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while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
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UART_THR(lpc_serial->hw_base) = '\r';
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}
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while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
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UART_THR(lpc_serial->hw_base) = *ptr;
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ptr ++;
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size --;
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}
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}
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else
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{
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while (size)
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{
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while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
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UART_THR(lpc_serial->hw_base) = *ptr;
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ptr ++;
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size --;
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}
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}
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return (rt_size_t) ptr - (rt_size_t) buffer;
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}
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void rt_hw_serial_init(void)
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{
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struct rt_lpcserial* lpc_serial;
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#ifdef RT_USING_UART1
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lpc_serial = &serial1;
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lpc_serial->parent.type = RT_Device_Class_Char;
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lpc_serial->hw_base = 0xE000C000;
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lpc_serial->baudrate = 115200;
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lpc_serial->irqno = UART0_INT;
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rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
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lpc_serial->read_index = lpc_serial->save_index = 0;
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/* Enable UART0 RxD and TxD pins */
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PINSEL0 |= 0x50;
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/* 8 bits, no Parity, 1 Stop bit */
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UART_LCR(lpc_serial->hw_base) = 0x83;
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/* Setup Baudrate */
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UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
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UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
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/* DLAB = 0 */
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UART_LCR(lpc_serial->hw_base) = 0x03;
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lpc_serial->parent.type = RT_Device_Class_Char;
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lpc_serial->parent.init = rt_serial_init;
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lpc_serial->parent.open = rt_serial_open;
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lpc_serial->parent.close = rt_serial_close;
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lpc_serial->parent.read = rt_serial_read;
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lpc_serial->parent.write = rt_serial_write;
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lpc_serial->parent.control = rt_serial_control;
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lpc_serial->parent.user_data = RT_NULL;
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rt_device_register(&lpc_serial->parent,
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"uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM);
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#endif
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#ifdef RT_USING_UART2
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lpc_serial = &serial2;
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lpc_serial->parent.type = RT_Device_Class_Char;
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lpc_serial->hw_base = 0xE0010000;
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lpc_serial->baudrate = 115200;
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lpc_serial->irqno = UART1_INT;
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rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
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lpc_serial->read_index = lpc_serial->save_index = 0;
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/* Enable UART1 RxD and TxD pins */
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PINSEL0 |= 0x05 << 16;
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/* 8 bits, no Parity, 1 Stop bit */
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UART_LCR(lpc_serial->hw_base) = 0x83;
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/* Setup Baudrate */
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UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
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UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
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/* DLAB = 0 */
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UART_LCR(lpc_serial->hw_base) = 0x03;
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lpc_serial->parent.type = RT_Device_Class_Char;
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lpc_serial->parent.init = rt_serial_init;
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lpc_serial->parent.open = rt_serial_open;
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lpc_serial->parent.close = rt_serial_close;
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lpc_serial->parent.read = rt_serial_read;
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lpc_serial->parent.write = rt_serial_write;
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lpc_serial->parent.control = rt_serial_control;
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lpc_serial->parent.user_data = RT_NULL;
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rt_device_register(&lpc_serial->parent,
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"uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
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#endif
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}
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/*@}*/
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