commit
ebe21c4760
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@ -22,6 +22,7 @@
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* 2011-01-13 weety first version
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* 2015-04-15 ArdaFu Split from AT91SAM9260 BSP
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* 2015-04-21 ArdaFu Remove remap code. Using mmu to map vector table
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* 2015-06-04 aozima Align stack address to 8 byte.
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*/
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#define S_FRAME_SIZE (18*4) //72
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@ -61,31 +62,32 @@
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.section .nobss, "w"
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.space UND_STK_SIZE
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.align 3
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.global UND_STACK_START
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UND_STACK_START:
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.space ABT_STK_SIZE
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.align 2
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.align 3
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.global ABT_STACK_START
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ABT_STACK_START:
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.space FIQ_STK_SIZE
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.align 2
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.align 3
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.global FIQ_STACK_START
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FIQ_STACK_START:
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.space IRQ_STK_SIZE
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.align 2
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.align 3
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.global IRQ_STACK_START
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IRQ_STACK_START:
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.skip SYS_STK_SIZE
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.align 2
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.align 3
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.global SYS_STACK_START
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SYS_STACK_START:
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.space SVC_STK_SIZE
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.align 2
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.align 3
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.global SVC_STACK_START
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SVC_STACK_START:
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@ -22,6 +22,7 @@
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; * 2011-01-13 weety first version
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; * 2015-04-15 ArdaFu Split from AT91SAM9260 BSP
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; * 2015-04-21 ArdaFu Remove remap code. Using mmu to map vector table
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; * 2015-06-04 aozima Align stack address to 8 byte.
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; */
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#define S_FRAME_SIZE (18*4) ;72
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@ -62,31 +63,32 @@
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SECTION .noinit:DATA:NOROOT(3)
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DATA
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ALIGNRAM 3
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DS8 UND_STK_SIZE
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PUBLIC UND_STACK_START
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UND_STACK_START:
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ALIGNRAM 2
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ALIGNRAM 3
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DS8 ABT_STK_SIZE
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PUBLIC ABT_STACK_START
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ABT_STACK_START:
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ALIGNRAM 2
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ALIGNRAM 3
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DS8 FIQ_STK_SIZE
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PUBLIC FIQ_STACK_START
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FIQ_STACK_START:
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ALIGNRAM 2
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ALIGNRAM 3
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DS8 IRQ_STK_SIZE
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PUBLIC IRQ_STACK_START
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IRQ_STACK_START:
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ALIGNRAM 2
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ALIGNRAM 3
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DS8 SYS_STK_SIZE
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PUBLIC SYS_STACK_START
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SYS_STACK_START:
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ALIGNRAM 2
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ALIGNRAM 3
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DS8 SVC_STK_SIZE
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PUBLIC SVC_STACK_START
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SVC_STACK_START:
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@ -22,6 +22,7 @@
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; * 2011-08-14 weety first version
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; * 2015-04-15 ArdaFu Split from AT91SAM9260 BSP
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; * 2015-04-21 ArdaFu Remove remap code. Using mmu to map vector table
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; * 2015-06-04 aozima Align stack address to 8 byte.
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; */
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S_FRAME_SIZE EQU (18*4) ;72
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@ -60,38 +61,44 @@ NOINT EQU 0xC0
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GET rt_low_level_keil.inc
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;----------------------- Stack and Heap Definitions ----------------------------
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AREA STACK, NOINIT, READWRITE, ALIGN=2
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem
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SPACE UND_STK_SIZE
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EXPORT UND_STACK_START
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UND_STACK_START
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ALIGN 4
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ALIGN 8
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SPACE ABT_STK_SIZE
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EXPORT ABT_STACK_START
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ABT_STACK_START
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ALIGN 4
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ALIGN 8
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SPACE FIQ_STK_SIZE
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EXPORT FIQ_STACK_START
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FIQ_STACK_START
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ALIGN 4
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ALIGN 8
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SPACE IRQ_STK_SIZE
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EXPORT IRQ_STACK_START
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IRQ_STACK_START
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ALIGN 4
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ALIGN 8
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SPACE SYS_STK_SIZE
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EXPORT SYS_STACK_START
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SYS_STACK_START
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ALIGN 4
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ALIGN 8
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SPACE SVC_STK_SIZE
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EXPORT SVC_STACK_START
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SVC_STACK_START
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Stack_Top
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__initial_sp
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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;--------------Jump vector table------------------------------------------------
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EXPORT Entry_Point
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@ -291,4 +298,31 @@ rt_hw_context_switch_interrupt_do PROC
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LDMFD SP!, {R0-R12,LR,PC}^ ; pop new task's R0-R12,LR & PC SPSR to CPSR
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ENDP
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;*******************************************************************************
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; User Stack and Heap initialization
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;*******************************************************************************
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem ; heap base
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LDR R1, = SVC_STACK_START ; stack base (top-address)
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LDR R2, = (Heap_Mem + Heap_Size) ; heap limit
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LDR R3, = (SVC_STACK_START - SVC_STK_SIZE) ; stack limit (low-address)
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BX LR
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ALIGN
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ENDIF
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END
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Loading…
Reference in New Issue