diff --git a/bsp/stm32f030r8-nucleo/drivers/board.c b/bsp/stm32f030r8-nucleo/drivers/board.c index 0c880d474..e2b13a19f 100644 --- a/bsp/stm32f030r8-nucleo/drivers/board.c +++ b/bsp/stm32f030r8-nucleo/drivers/board.c @@ -24,85 +24,165 @@ /*@{*/ +// void HAL_MspInit(void) +// { +// HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); +// /* System interrupt init*/ +// __HAL_RCC_AFIO_CLK_ENABLE(); +// /* MemoryManagement_IRQn interrupt configuration */ +// HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); +// /* BusFault_IRQn interrupt configuration */ +// HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); +// /* UsageFault_IRQn interrupt configuration */ +// HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); +// /* SVCall_IRQn interrupt configuration */ +// HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); +// /* DebugMonitor_IRQn interrupt configuration */ +// HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); +// /* PendSV_IRQn interrupt configuration */ +// HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0); +// /* SysTick_IRQn interrupt configuration */ +// HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0); +// /**DISABLE: JTAG-DP Disabled and SW-DP Disabled**/ +// __HAL_AFIO_REMAP_SWJ_NOJTAG(); +// } + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ void HAL_MspInit(void) { - HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + /* System interrupt init*/ - __HAL_RCC_AFIO_CLK_ENABLE(); - /* MemoryManagement_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); - /* BusFault_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); - /* UsageFault_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); - /* SVCall_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); - /* DebugMonitor_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); + /* SVC_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(SVC_IRQn, 0, 0); /* PendSV_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0); + HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); /* SysTick_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0); - /**DISABLE: JTAG-DP Disabled and SW-DP Disabled**/ - __HAL_AFIO_REMAP_SWJ_NOJTAG(); + HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ } +/** + * @brief System Clock Configuration + * @retval None + */ void SystemClock_Config(void) { - rt_err_t ret = RT_EOK; + RCC_OscInitTypeDef RCC_OscInitStruct; RCC_ClkInitTypeDef RCC_ClkInitStruct; - -#if !defined(RT_USING_HSI) - /* Initializes the CPU, AHB and APB busses clocks */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_ON; - RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; - ret = HAL_RCC_OscConfig(&RCC_OscInitStruct); - RT_ASSERT(ret == HAL_OK); - - /* Initializes the CPU, AHB and APB busses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | - RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); - RT_ASSERT(ret == HAL_OK); - - HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / RT_TICK_PER_SECOND); - HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); - HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0); -#else - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSICalibrationValue = 16; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; - ret = HAL_RCC_OscConfig(&RCC_OscInitStruct); - RT_ASSERT(ret == HAL_OK); + RCC_PeriphCLKInitTypeDef PeriphClkInit; - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK | - RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); - RT_ASSERT(ret == HAL_OK); - - HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/RT_TICK_PER_SECOND); + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + _Error_Handler(__FILE__, __LINE__); + } + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + _Error_Handler(__FILE__, __LINE__); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; + PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure the Systick interrupt time + */ + HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000); + + /**Configure the Systick + */ HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); - HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0); -#endif + + /* SysTick_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); } +// void SystemClock_Config(void) +// { +// rt_err_t ret = RT_EOK; +// RCC_OscInitTypeDef RCC_OscInitStruct; +// RCC_ClkInitTypeDef RCC_ClkInitStruct; + +// #if !defined(RT_USING_HSI) +// /* Initializes the CPU, AHB and APB busses clocks */ +// RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; +// RCC_OscInitStruct.HSEState = RCC_HSE_ON; +// RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; +// RCC_OscInitStruct.HSIState = RCC_HSI_ON; +// RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; +// RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; +// RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; +// ret = HAL_RCC_OscConfig(&RCC_OscInitStruct); +// RT_ASSERT(ret == HAL_OK); + +// /* Initializes the CPU, AHB and APB busses clocks */ +// RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | +// RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; +// RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; +// RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; +// RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; +// RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; +// ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); +// RT_ASSERT(ret == HAL_OK); + +// HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / RT_TICK_PER_SECOND); +// HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); +// HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0); +// #else +// RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; +// RCC_OscInitStruct.HSIState = RCC_HSI_ON; +// RCC_OscInitStruct.HSICalibrationValue = 16; +// RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; +// RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; +// RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; +// ret = HAL_RCC_OscConfig(&RCC_OscInitStruct); +// RT_ASSERT(ret == HAL_OK); + +// RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK | +// RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; +// RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; +// RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; +// RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; +// RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; +// ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); +// RT_ASSERT(ret == HAL_OK); + +// HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/RT_TICK_PER_SECOND); +// HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); +// HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0); +// #endif +// } + /** * This is the timer interrupt service routine. * diff --git a/bsp/stm32f030r8-nucleo/drivers/board.h b/bsp/stm32f030r8-nucleo/drivers/board.h index 070bceb91..48950534d 100644 --- a/bsp/stm32f030r8-nucleo/drivers/board.h +++ b/bsp/stm32f030r8-nucleo/drivers/board.h @@ -20,13 +20,11 @@ #include "stm32f0xx_hal.h" /* board configuration */ -#if defined(STM32F030RB) -#define STM32F0XX_PIN_NUMBERS 64 -#endif -#if defined(STM32F030RB) +#define STM32F0XX_PIN_NUMBERS 64 + #define STM32_SRAM_SIZE 8 -#endif + /* whether use board external SRAM memory */ // Use external SRAM memory on the board diff --git a/bsp/stm32f030r8-nucleo/drivers/stm32f0xx_hal_conf.h b/bsp/stm32f030r8-nucleo/drivers/stm32f0xx_hal_conf.h index cbf98b21c..913a32531 100644 --- a/bsp/stm32f030r8-nucleo/drivers/stm32f0xx_hal_conf.h +++ b/bsp/stm32f030r8-nucleo/drivers/stm32f0xx_hal_conf.h @@ -39,8 +39,11 @@ #ifdef __cplusplus extern "C" { #endif - -#include "main.h" +#include "rtthread.h" +#ifndef NULL +#define NULL RT_NULL +#endif +// #include "main.h" /* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/ @@ -66,8 +69,10 @@ /*#define HAL_RTC_MODULE_ENABLED */ /*#define HAL_SPI_MODULE_ENABLED */ /*#define HAL_TIM_MODULE_ENABLED */ +#ifdef RT_USING_SERIAL #define HAL_UART_MODULE_ENABLED -/*#define HAL_USART_MODULE_ENABLED */ +#define HAL_USART_MODULE_ENABLED +#endif /*#define HAL_IRDA_MODULE_ENABLED */ /*#define HAL_SMARTCARD_MODULE_ENABLED */ /*#define HAL_SMBUS_MODULE_ENABLED */ diff --git a/bsp/stm32f030r8-nucleo/drivers/stm32f0xx_hal_msp.c b/bsp/stm32f030r8-nucleo/drivers/stm32f0xx_hal_msp.c deleted file mode 100644 index 40f87faa6..000000000 --- a/bsp/stm32f030r8-nucleo/drivers/stm32f0xx_hal_msp.c +++ /dev/null @@ -1,197 +0,0 @@ -/** - ****************************************************************************** - * File Name : stm32f0xx_hal_msp.c - * Description : This file provides code for the MSP Initialization - * and de-Initialization codes. - ****************************************************************************** - ** This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * COPYRIGHT(c) 2018 STMicroelectronics - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ -#include "stm32f0xx_hal.h" - -extern void _Error_Handler(char *, int); -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ -/** - * Initializes the Global MSP. - */ -void HAL_MspInit(void) -{ - /* USER CODE BEGIN MspInit 0 */ - - /* USER CODE END MspInit 0 */ - - __HAL_RCC_SYSCFG_CLK_ENABLE(); - __HAL_RCC_PWR_CLK_ENABLE(); - - /* System interrupt init*/ - /* SVC_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(SVC_IRQn, 0, 0); - /* PendSV_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); - /* SysTick_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); - - /* USER CODE BEGIN MspInit 1 */ - - /* USER CODE END MspInit 1 */ -} - -void HAL_UART_MspInit(UART_HandleTypeDef* huart) -{ - - GPIO_InitTypeDef GPIO_InitStruct; - if(huart->Instance==USART1) - { - /* USER CODE BEGIN USART1_MspInit 0 */ - - /* USER CODE END USART1_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_USART1_CLK_ENABLE(); - - /**USART1 GPIO Configuration - PA9 ------> USART1_TX - PA10 ------> USART1_RX - PA12 ------> USART1_DE - */ - GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_12; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF1_USART1; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* USER CODE BEGIN USART1_MspInit 1 */ - - /* USER CODE END USART1_MspInit 1 */ - } - else if(huart->Instance==USART2) - { - /* USER CODE BEGIN USART2_MspInit 0 */ - - /* USER CODE END USART2_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_USART2_CLK_ENABLE(); - - /**USART2 GPIO Configuration - PA2 ------> USART2_TX - PA3 ------> USART2_RX - */ - GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.Alternate = GPIO_AF1_USART2; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* USER CODE BEGIN USART2_MspInit 1 */ - - /* USER CODE END USART2_MspInit 1 */ - } - -} - -void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) -{ - - if(huart->Instance==USART1) - { - /* USER CODE BEGIN USART1_MspDeInit 0 */ - - /* USER CODE END USART1_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USART1_CLK_DISABLE(); - - /**USART1 GPIO Configuration - PA9 ------> USART1_TX - PA10 ------> USART1_RX - PA12 ------> USART1_DE - */ - HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_12); - - /* USER CODE BEGIN USART1_MspDeInit 1 */ - - /* USER CODE END USART1_MspDeInit 1 */ - } - else if(huart->Instance==USART2) - { - /* USER CODE BEGIN USART2_MspDeInit 0 */ - - /* USER CODE END USART2_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USART2_CLK_DISABLE(); - - /**USART2 GPIO Configuration - PA2 ------> USART2_TX - PA3 ------> USART2_RX - */ - HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin); - - /* USER CODE BEGIN USART2_MspDeInit 1 */ - - /* USER CODE END USART2_MspDeInit 1 */ - } - -} - -void HAL_WWDG_MspInit(WWDG_HandleTypeDef* hwwdg) -{ - - if(hwwdg->Instance==WWDG) - { - /* USER CODE BEGIN WWDG_MspInit 0 */ - - /* USER CODE END WWDG_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_WWDG_CLK_ENABLE(); - /* USER CODE BEGIN WWDG_MspInit 1 */ - - /* USER CODE END WWDG_MspInit 1 */ - } - -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32f030r8-nucleo/drivers/stm32f1xx_hal_conf.h b/bsp/stm32f030r8-nucleo/drivers/stm32f1xx_hal_conf.h deleted file mode 100644 index 32be5f38d..000000000 --- a/bsp/stm32f030r8-nucleo/drivers/stm32f1xx_hal_conf.h +++ /dev/null @@ -1,401 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f1xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.1 - * @date 12-May-2017 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32f1xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F1xx_HAL_CONF_H -#define __STM32F1xx_HAL_CONF_H - -#ifdef __cplusplus -extern "C" { -#endif -#include "rtthread.h" -#ifndef NULL -#define NULL RT_NULL -#endif -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -// #define HAL_ADC_MODULE_ENABLED -// #define HAL_CAN_MODULE_ENABLED -// #define HAL_CEC_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED -// #define HAL_CRC_MODULE_ENABLED -// #define HAL_DAC_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -// #define HAL_ETH_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_GPIO_MODULE_ENABLED -// #define HAL_HCD_MODULE_ENABLED -// #define HAL_I2C_MODULE_ENABLED -// #define HAL_I2S_MODULE_ENABLED -// #define HAL_IRDA_MODULE_ENABLED -// #define HAL_IWDG_MODULE_ENABLED -// #define HAL_NAND_MODULE_ENABLED -// #define HAL_NOR_MODULE_ENABLED -// #define HAL_PCCARD_MODULE_ENABLED -#ifdef RT_USING_USB_DEVICE -#define HAL_PCD_MODULE_ENABLED -#endif -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -// #define HAL_RTC_MODULE_ENABLED -#ifdef RT_USING_SDCARD -#define HAL_SD_MODULE_ENABLED -#endif -// #define HAL_SMARTCARD_MODULE_ENABLED -#ifdef RT_USING_SPI -#define HAL_SPI_MODULE_ENABLED -#endif -// #define HAL_SRAM_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#ifdef RT_USING_SERIAL -#define HAL_UART_MODULE_ENABLED -#define HAL_USART_MODULE_ENABLED -#endif - -// #define HAL_WWDG_MODULE_ENABLED -// #define HAL_MMC_MODULE_ENABLED - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined(RT_USING_HSI) -#define HSE_VALUE ((unsigned int)RT_HSE_VALUE) -#endif - -//#define HSE_VALUE ((unsigned int)RT_HSE_VALUE) - -#if !defined (HSE_VALUE) -#if defined(USE_STM3210C_EVAL) -#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ -#else -#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ -#endif -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) -#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) -#define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz */ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) -#define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz -The real value may vary depending on the variations -in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) -#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) -#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE 3300U /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1U */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2U -#define MAC_ADDR1 0U -#define MAC_ADDR2 0U -#define MAC_ADDR3 0U -#define MAC_ADDR4 0U -#define MAC_ADDR5 0U - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB 8U /* 8 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY 0x000000FFU -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY 0x00000FFFU - -#define PHY_READ_TO 0x0000FFFFU -#define PHY_WRITE_TO 0x0000FFFFU - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver -* Activated: CRC code is present inside driver -* Deactivated: CRC code cleaned from driver -*/ - -#define USE_SPI_CRC 1U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED -#include "stm32f1xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED -#include "stm32f1xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED -#include "stm32f1xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED -#include "stm32f1xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED -#include "stm32f1xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED -#include "stm32f1xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED -#include "stm32f1xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED -#include "stm32f1xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED -#include "stm32f1xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED -#include "stm32f1xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED -#include "stm32f1xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED -#include "stm32f1xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED -#include "stm32f1xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED -#include "stm32f1xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED -#include "stm32f1xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED -#include "stm32f1xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED -#include "stm32f1xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED -#include "stm32f1xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED -#include "stm32f1xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED -#include "stm32f1xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED -#include "stm32f1xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED -#include "stm32f1xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED -#include "stm32f1xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED -#include "stm32f1xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED -#include "stm32f1xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED -#include "stm32f1xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED -#include "stm32f1xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED -#include "stm32f1xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED -#include "stm32f1xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED -#include "stm32f1xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_MMC_MODULE_ENABLED -#include "stm32f1xx_hal_mmc.h" -#endif /* HAL_MMC_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t *file, uint32_t line); -#else -#define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F1xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32f030r8-nucleo/drivers/stm32f1xx_it.c b/bsp/stm32f030r8-nucleo/drivers/stm32f1xx_it.c deleted file mode 100644 index 855e1f8dc..000000000 --- a/bsp/stm32f030r8-nucleo/drivers/stm32f1xx_it.c +++ /dev/null @@ -1,139 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f1xx_it.c - * @brief Interrupt Service Routines. - ****************************************************************************** - * - * COPYRIGHT(c) 2017 STMicroelectronics - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ -#include "stm32f1xx_hal.h" -#include "stm32f1xx.h" -#include "stm32f1xx_it.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* External variables --------------------------------------------------------*/ - -/******************************************************************************/ -/* Cortex-M3 Processor Interruption and Exception Handlers */ -/******************************************************************************/ - -/** -* @brief This function handles Non maskable interrupt. -*/ -void NMI_Handler(void) -{ - /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ - - /* USER CODE END NonMaskableInt_IRQn 0 */ - /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ - - /* USER CODE END NonMaskableInt_IRQn 1 */ -} - - - -/** -* @brief This function handles Memory management fault. -*/ -void MemManage_Handler(void) -{ - /* USER CODE BEGIN MemoryManagement_IRQn 0 */ - - /* USER CODE END MemoryManagement_IRQn 0 */ - while (1) - { - } - /* USER CODE BEGIN MemoryManagement_IRQn 1 */ - - /* USER CODE END MemoryManagement_IRQn 1 */ -} - -/** -* @brief This function handles Prefetch fault, memory access fault. -*/ -void BusFault_Handler(void) -{ - /* USER CODE BEGIN BusFault_IRQn 0 */ - - /* USER CODE END BusFault_IRQn 0 */ - while (1) - { - } - /* USER CODE BEGIN BusFault_IRQn 1 */ - - /* USER CODE END BusFault_IRQn 1 */ -} - -/** -* @brief This function handles Undefined instruction or illegal state. -*/ -void UsageFault_Handler(void) -{ - /* USER CODE BEGIN UsageFault_IRQn 0 */ - - /* USER CODE END UsageFault_IRQn 0 */ - while (1) - { - } - /* USER CODE BEGIN UsageFault_IRQn 1 */ - - /* USER CODE END UsageFault_IRQn 1 */ -} - -/** -* @brief This function handles Debug monitor. -*/ -void DebugMon_Handler(void) -{ - /* USER CODE BEGIN DebugMonitor_IRQn 0 */ - - /* USER CODE END DebugMonitor_IRQn 0 */ - /* USER CODE BEGIN DebugMonitor_IRQn 1 */ - - /* USER CODE END DebugMonitor_IRQn 1 */ -} - -/** -* @brief This function handles System tick timer. -*/ - - -/******************************************************************************/ -/* STM32F1xx Peripheral Interrupt Handlers */ -/* Add here the Interrupt Handlers for the used peripherals. */ -/* For the available peripheral interrupt handler names, */ -/* please refer to the startup file (startup_stm32f1xx.s). */ -/******************************************************************************/ - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32f030r8-nucleo/drivers/stm32f1xx_it.h b/bsp/stm32f030r8-nucleo/drivers/stm32f1xx_it.h deleted file mode 100644 index ac3168779..000000000 --- a/bsp/stm32f030r8-nucleo/drivers/stm32f1xx_it.h +++ /dev/null @@ -1,61 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f1xx_it.h - * @brief This file contains the headers of the interrupt handlers. - ****************************************************************************** - * - * COPYRIGHT(c) 2017 STMicroelectronics - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F1xx_IT_H -#define __STM32F1xx_IT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f1xx_hal.h" -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -void NMI_Handler(void); -void MemManage_Handler(void); -void BusFault_Handler(void); -void UsageFault_Handler(void); -void DebugMon_Handler(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F1xx_IT_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/