all FM3 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/fm3
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1861 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
dzzxzz
parent
70a7964f2c
commit
d6892fb441
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@ -3,6 +3,15 @@ Import('rtconfig')
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from building import *
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src = Glob('*.c')
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# add for startup script
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if rtconfig.CROSS_TOOL == 'gcc':
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src = src + ['start_gcc.S']
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elif rtconfig.CROSS_TOOL == 'keil':
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src = src + ['start_rvds.S']
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elif rtconfig.CROSS_TOOL == 'iar':
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src = src + ['start_iar.S']
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CPPPATH = [GetCurrentDir()]
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group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH, LIBRARY = '')
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@ -116,7 +116,7 @@ g_pfnVectors:
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.word Initial_spTop
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.word Reset_Handler
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.word NMI_Handler
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.word rt_hw_hard_fault
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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@ -127,8 +127,8 @@ g_pfnVectors:
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word rt_hw_pend_sv
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.word rt_hw_timer_handler
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.word PendSV_Handler
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.word SysTick_Handler
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.word CSV_IRQHandler
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.word SWDT_IRQHandler
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@ -189,7 +189,10 @@ g_pfnVectors:
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.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler,Default_Handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler,Default_Handler
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@ -205,6 +208,12 @@ g_pfnVectors:
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.weak DebugMon_Handler
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.thumb_set DebugMon_Handler,Default_Handler
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.weak PendSV_Handler
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.thumb_set PendSV_Handler,Default_Handler
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.weak SysTick_Handler
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.thumb_set SysTick_Handler,Default_Handler
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.weak CSV_IRQHandler
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.thumb_set CSV_IRQHandler,Default_Handler
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@ -23,9 +23,6 @@
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .icode:CODE:NOROOT(2)
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IMPORT rt_hw_hard_fault
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IMPORT rt_hw_pend_sv
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IMPORT rt_hw_timer_handler
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#ifdef RT_USING_UART2
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IMPORT MFS2RX_IRQHandler
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#endif
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@ -60,7 +57,7 @@ __vector_table
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DCD __iar_program_start
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DCD NMI_Handler ; NMI Handler
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DCD rt_hw_hard_fault ; Hard Fault Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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@ -71,8 +68,8 @@ __vector_table
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD rt_hw_pend_sv ; PendSV Handler
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DCD rt_hw_timer_handler ; SysTick Handler
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD CSV_IRQHandler ; Clock Super Visor
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@ -138,6 +135,10 @@ __vector_table
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SECTION .text:CODE:REORDER(1)
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NMI_Handler
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B NMI_Handler
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PUBWEAK HardFault_Handler
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SECTION .text:CODE:REORDER(1)
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HardFault_Handler
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B HardFault_Handler
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PUBWEAK MemManage_Handler
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SECTION .text:CODE:REORDER(1)
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MemManage_Handler
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@ -158,6 +159,14 @@ SVC_Handler
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SECTION .text:CODE:REORDER(1)
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DebugMon_Handler
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B DebugMon_Handler
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PUBWEAK PendSV_Handler
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SECTION .text:CODE:REORDER(1)
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PendSV_Handler
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B PendSV_Handler
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PUBWEAK SysTick_Handler
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SECTION .text:CODE:REORDER(1)
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SysTick_Handler
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B SysTick_Handler
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PUBWEAK CSV_IRQHandler
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SECTION .text:CODE:REORDER(1)
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CSV_IRQHandler
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@ -37,10 +37,6 @@ __heap_limit
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PRESERVE8
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THUMB
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IMPORT rt_hw_hard_fault
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IMPORT rt_hw_pend_sv
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IMPORT rt_hw_timer_handler
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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@ -48,70 +44,70 @@ __heap_limit
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD rt_hw_hard_fault ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD rt_hw_pend_sv ; PendSV Handler
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DCD rt_hw_timer_handler ; SysTick Handler
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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DCD CSV_Handler ; 0: Clock Super Visor
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DCD SWDT_Handler ; 1: Software Watchdog Timer
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DCD LVD_Handler ; 2: Low Voltage Detector
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DCD MFT_WG_IRQHandler ; 3: Wave Form Generator / DTIF
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DCD INT0_7_Handler ; 4: External Interrupt Request ch.0 to ch.7
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DCD INT8_15_Handler ; 5: External Interrupt Request ch.8 to ch.15
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DCD DT_Handler ; 6: Dual Timer / Quad Decoder
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DCD MFS0RX_IRQHandler ; 7: MultiFunction Serial ch.0
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DCD MFS0TX_IRQHandler ; 8: MultiFunction Serial ch.0
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DCD MFS1RX_IRQHandler ; 9: MultiFunction Serial ch.1
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DCD MFS1TX_IRQHandler ; 10: MultiFunction Serial ch.1
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DCD MFS2RX_IRQHandler ; 11: MultiFunction Serial ch.2
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DCD MFS2TX_IRQHandler ; 12: MultiFunction Serial ch.2
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DCD MFS3RX_IRQHandler ; 13: MultiFunction Serial ch.3
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DCD MFS3TX_IRQHandler ; 14: MultiFunction Serial ch.3
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DCD MFS4RX_IRQHandler ; 15: MultiFunction Serial ch.4
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DCD MFS4TX_IRQHandler ; 16: MultiFunction Serial ch.4
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DCD MFS5RX_IRQHandler ; 17: MultiFunction Serial ch.5
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DCD MFS5TX_IRQHandler ; 18: MultiFunction Serial ch.5
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DCD MFS6RX_IRQHandler ; 19: MultiFunction Serial ch.6
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DCD MFS6TX_IRQHandler ; 20: MultiFunction Serial ch.6
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DCD MFS7RX_IRQHandler ; 21: MultiFunction Serial ch.7
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DCD MFS7TX_IRQHandler ; 22: MultiFunction Serial ch.7
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DCD PPG_Handler ; 23: PPG
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DCD TIM_IRQHandler ; 24: OSC / PLL / Watch Counter
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DCD ADC0_IRQHandler ; 25: ADC0
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DCD ADC1_IRQHandler ; 26: ADC1
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DCD ADC2_IRQHandler ; 27: ADC2
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DCD MFT_FRT_IRQHandler ; 28: Free-run Timer
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DCD MFT_IPC_IRQHandler ; 29: Input Capture
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DCD MFT_OPC_IRQHandler ; 30: Output Compare
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DCD BT_IRQHandler ; 31: Base Timer ch.0 to ch.7
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DCD CAN0_IRQHandler ; 32: CAN ch.0
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DCD CAN1_IRQHandler ; 33: CAN ch.1
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DCD USBF_Handler ; 34: USB Function
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DCD USB_Handler ; 35: USB Function / USB HOST
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DCD DummyHandler ; 36: Reserved
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DCD DummyHandler ; 37: Reserved
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DCD DMAC0_Handler ; 38: DMAC ch.0
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DCD DMAC1_Handler ; 39: DMAC ch.1
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DCD DMAC2_Handler ; 40: DMAC ch.2
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DCD DMAC3_Handler ; 41: DMAC ch.3
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DCD DMAC4_Handler ; 42: DMAC ch.4
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DCD DMAC5_Handler ; 43: DMAC ch.5
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DCD DMAC6_Handler ; 44: DMAC ch.6
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DCD DMAC7_Handler ; 45: DMAC ch.7
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DCD DummyHandler ; 46: Reserved
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DCD DummyHandler ; 47: Reserved
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DCD CSV_Handler ; 0: Clock Super Visor
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DCD SWDT_Handler ; 1: Software Watchdog Timer
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DCD LVD_Handler ; 2: Low Voltage Detector
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DCD MFT_WG_IRQHandler ; 3: Wave Form Generator / DTIF
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DCD INT0_7_Handler ; 4: External Interrupt Request ch.0 to ch.7
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DCD INT8_15_Handler ; 5: External Interrupt Request ch.8 to ch.15
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DCD DT_Handler ; 6: Dual Timer / Quad Decoder
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DCD MFS0RX_IRQHandler ; 7: MultiFunction Serial ch.0
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DCD MFS0TX_IRQHandler ; 8: MultiFunction Serial ch.0
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DCD MFS1RX_IRQHandler ; 9: MultiFunction Serial ch.1
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DCD MFS1TX_IRQHandler ; 10: MultiFunction Serial ch.1
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DCD MFS2RX_IRQHandler ; 11: MultiFunction Serial ch.2
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DCD MFS2TX_IRQHandler ; 12: MultiFunction Serial ch.2
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DCD MFS3RX_IRQHandler ; 13: MultiFunction Serial ch.3
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DCD MFS3TX_IRQHandler ; 14: MultiFunction Serial ch.3
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DCD MFS4RX_IRQHandler ; 15: MultiFunction Serial ch.4
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DCD MFS4TX_IRQHandler ; 16: MultiFunction Serial ch.4
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DCD MFS5RX_IRQHandler ; 17: MultiFunction Serial ch.5
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DCD MFS5TX_IRQHandler ; 18: MultiFunction Serial ch.5
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DCD MFS6RX_IRQHandler ; 19: MultiFunction Serial ch.6
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DCD MFS6TX_IRQHandler ; 20: MultiFunction Serial ch.6
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DCD MFS7RX_IRQHandler ; 21: MultiFunction Serial ch.7
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DCD MFS7TX_IRQHandler ; 22: MultiFunction Serial ch.7
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DCD PPG_Handler ; 23: PPG
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DCD TIM_IRQHandler ; 24: OSC / PLL / Watch Counter
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DCD ADC0_IRQHandler ; 25: ADC0
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DCD ADC1_IRQHandler ; 26: ADC1
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DCD ADC2_IRQHandler ; 27: ADC2
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DCD MFT_FRT_IRQHandler ; 28: Free-run Timer
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DCD MFT_IPC_IRQHandler ; 29: Input Capture
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DCD MFT_OPC_IRQHandler ; 30: Output Compare
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DCD BT_IRQHandler ; 31: Base Timer ch.0 to ch.7
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DCD CAN0_IRQHandler ; 32: CAN ch.0
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DCD CAN1_IRQHandler ; 33: CAN ch.1
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DCD USBF_Handler ; 34: USB Function
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DCD USB_Handler ; 35: USB Function / USB HOST
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DCD DummyHandler ; 36: Reserved
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DCD DummyHandler ; 37: Reserved
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DCD DMAC0_Handler ; 38: DMAC ch.0
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DCD DMAC1_Handler ; 39: DMAC ch.1
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DCD DMAC2_Handler ; 40: DMAC ch.2
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DCD DMAC3_Handler ; 41: DMAC ch.3
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DCD DMAC4_Handler ; 42: DMAC ch.4
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DCD DMAC5_Handler ; 43: DMAC ch.5
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DCD DMAC6_Handler ; 44: DMAC ch.6
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DCD DMAC7_Handler ; 45: DMAC ch.7
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DCD DummyHandler ; 46: Reserved
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DCD DummyHandler ; 47: Reserved
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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@ -166,6 +162,14 @@ DebugMon_Handler\
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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@ -31,7 +31,7 @@ extern const uint32_t SystemFrequency;
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* This is the timer interrupt service routine.
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*
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*/
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void rt_hw_timer_handler(void)
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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File diff suppressed because it is too large
Load Diff
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@ -30,7 +30,7 @@
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<option>
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<name>Variant</name>
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<version>18</version>
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<state>37</state>
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<state>0</state>
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</option>
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<option>
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<name>GEndianMode</name>
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@ -99,7 +99,7 @@
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</option>
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<option>
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<name>OGChipSelectEditMenu</name>
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<state>MB9BF500R Fujitsu MB9BF500R</state>
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<state>Default None</state>
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</option>
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<option>
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<name>GenLowLevelInterface</name>
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@ -138,7 +138,7 @@
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<option>
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<name>GFPUCoreSlave</name>
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<version>18</version>
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<state>37</state>
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<state>0</state>
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</option>
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<option>
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<name>GBECoreSlave</name>
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@ -1749,16 +1749,13 @@
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<group>
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<name>FM3</name>
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<file>
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<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\context_iar.S</name>
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<name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\context_iar.S</name>
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</file>
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<file>
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<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\cpuport.c</name>
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<name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\cpuport.c</name>
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</file>
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<file>
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<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\fault_iar.S</name>
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</file>
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<file>
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<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\start_iar.S</name>
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<name>$PROJ_DIR$\..\CMSIS\start_iar.S</name>
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</file>
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</group>
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<group>
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@ -160,10 +160,10 @@
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<FileType>1</FileType>
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<tvExp>0</tvExp>
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<Focus>0</Focus>
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<ColumnNumber>0</ColumnNumber>
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<ColumnNumber>43</ColumnNumber>
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<tvExpOptDlg>0</tvExpOptDlg>
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<TopLine>1</TopLine>
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<CurrentLine>1</CurrentLine>
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<TopLine>121</TopLine>
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<CurrentLine>121</CurrentLine>
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<bDave2>0</bDave2>
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<PathWithFileName>.\application.c</PathWithFileName>
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<FilenameWithoutPath>application.c</FilenameWithoutPath>
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@ -174,10 +174,10 @@
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<FileType>1</FileType>
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<tvExp>0</tvExp>
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<Focus>0</Focus>
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<ColumnNumber>0</ColumnNumber>
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<ColumnNumber>20</ColumnNumber>
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<tvExpOptDlg>0</tvExpOptDlg>
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<TopLine>0</TopLine>
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<CurrentLine>0</CurrentLine>
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<TopLine>32</TopLine>
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<CurrentLine>34</CurrentLine>
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<bDave2>0</bDave2>
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<PathWithFileName>.\board.c</PathWithFileName>
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<FilenameWithoutPath>board.c</FilenameWithoutPath>
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@ -290,58 +290,30 @@
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<File>
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<GroupNumber>2</GroupNumber>
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<FileNumber>10</FileNumber>
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<FileType>1</FileType>
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||||
<tvExp>0</tvExp>
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||||
<Focus>0</Focus>
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||||
<ColumnNumber>0</ColumnNumber>
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||||
<tvExpOptDlg>0</tvExpOptDlg>
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<TopLine>0</TopLine>
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<CurrentLine>0</CurrentLine>
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<bDave2>0</bDave2>
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<PathWithFileName>..\..\..\libcpu\arm\fm3\cpuport.c</PathWithFileName>
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<FilenameWithoutPath>cpuport.c</FilenameWithoutPath>
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</File>
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||||
<File>
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||||
<GroupNumber>2</GroupNumber>
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||||
<FileNumber>11</FileNumber>
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||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
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||||
<Focus>0</Focus>
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||||
<ColumnNumber>0</ColumnNumber>
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||||
<ColumnNumber>7</ColumnNumber>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
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||||
<TopLine>0</TopLine>
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||||
<CurrentLine>0</CurrentLine>
|
||||
<TopLine>116</TopLine>
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||||
<CurrentLine>116</CurrentLine>
|
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<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\libcpu\arm\fm3\context_rvds.S</PathWithFileName>
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<PathWithFileName>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</PathWithFileName>
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<FilenameWithoutPath>context_rvds.S</FilenameWithoutPath>
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</File>
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<File>
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<GroupNumber>2</GroupNumber>
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||||
<FileNumber>12</FileNumber>
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||||
<FileType>2</FileType>
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||||
<FileNumber>11</FileNumber>
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||||
<FileType>1</FileType>
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||||
<tvExp>0</tvExp>
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||||
<Focus>0</Focus>
|
||||
<ColumnNumber>0</ColumnNumber>
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||||
<ColumnNumber>22</ColumnNumber>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
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||||
<TopLine>0</TopLine>
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||||
<CurrentLine>0</CurrentLine>
|
||||
<TopLine>1</TopLine>
|
||||
<CurrentLine>1</CurrentLine>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\libcpu\arm\fm3\fault_rvds.S</PathWithFileName>
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||||
<FilenameWithoutPath>fault_rvds.S</FilenameWithoutPath>
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</File>
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<File>
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||||
<GroupNumber>2</GroupNumber>
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<FileNumber>13</FileNumber>
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<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
<ColumnNumber>0</ColumnNumber>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<TopLine>0</TopLine>
|
||||
<CurrentLine>0</CurrentLine>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\libcpu\arm\fm3\start_rvds.S</PathWithFileName>
|
||||
<FilenameWithoutPath>start_rvds.S</FilenameWithoutPath>
|
||||
<PathWithFileName>..\..\..\libcpu\arm\cortex-m3\cpuport.c</PathWithFileName>
|
||||
<FilenameWithoutPath>cpuport.c</FilenameWithoutPath>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
|
|
@ -352,32 +324,46 @@
|
|||
<cbSel>0</cbSel>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>14</FileNumber>
|
||||
<FileNumber>12</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
<ColumnNumber>0</ColumnNumber>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<TopLine>0</TopLine>
|
||||
<CurrentLine>0</CurrentLine>
|
||||
<TopLine>1</TopLine>
|
||||
<CurrentLine>1</CurrentLine>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\CMSIS\core_cm3.c</PathWithFileName>
|
||||
<FilenameWithoutPath>core_cm3.c</FilenameWithoutPath>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>15</FileNumber>
|
||||
<FileNumber>13</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
<ColumnNumber>0</ColumnNumber>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<TopLine>0</TopLine>
|
||||
<CurrentLine>0</CurrentLine>
|
||||
<TopLine>1</TopLine>
|
||||
<CurrentLine>1</CurrentLine>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\CMSIS\system_mb9bf50x.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_mb9bf50x.c</FilenameWithoutPath>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>14</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
<ColumnNumber>39</ColumnNumber>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<TopLine>47</TopLine>
|
||||
<CurrentLine>61</CurrentLine>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\CMSIS\start_rvds.S</PathWithFileName>
|
||||
<FilenameWithoutPath>start_rvds.S</FilenameWithoutPath>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
|
|
@ -387,7 +373,7 @@
|
|||
<cbSel>0</cbSel>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>16</FileNumber>
|
||||
<FileNumber>15</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -401,7 +387,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>17</FileNumber>
|
||||
<FileNumber>16</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -415,7 +401,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>18</FileNumber>
|
||||
<FileNumber>17</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -429,7 +415,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>19</FileNumber>
|
||||
<FileNumber>18</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -443,7 +429,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>20</FileNumber>
|
||||
<FileNumber>19</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -457,7 +443,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>21</FileNumber>
|
||||
<FileNumber>20</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -471,7 +457,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>22</FileNumber>
|
||||
<FileNumber>21</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -485,7 +471,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>23</FileNumber>
|
||||
<FileNumber>22</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -499,7 +485,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>24</FileNumber>
|
||||
<FileNumber>23</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -513,7 +499,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>25</FileNumber>
|
||||
<FileNumber>24</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -527,7 +513,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>26</FileNumber>
|
||||
<FileNumber>25</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -541,7 +527,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>27</FileNumber>
|
||||
<FileNumber>26</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -555,7 +541,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>28</FileNumber>
|
||||
<FileNumber>27</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -569,7 +555,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>29</FileNumber>
|
||||
<FileNumber>28</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -583,7 +569,7 @@
|
|||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>30</FileNumber>
|
||||
<FileNumber>29</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
|
|
@ -597,47 +583,4 @@
|
|||
</File>
|
||||
</Group>
|
||||
|
||||
<AlienFiles>
|
||||
<PathWithFilename>C:\Users\xxxx\Desktop\20110622\RTT\bsp\fm3\mb9bf500r\rtconfig.h</PathWithFilename>
|
||||
<TopLine>60</TopLine>
|
||||
<CurrentLine>66</CurrentLine>
|
||||
<Constant>0</Constant>
|
||||
<WindowPosition>
|
||||
<length>0</length>
|
||||
<flags>0</flags>
|
||||
<showCmd>0</showCmd>
|
||||
<MinPosition>
|
||||
<xPos>0</xPos>
|
||||
<yPos>0</yPos>
|
||||
</MinPosition>
|
||||
<MaxPosition>
|
||||
<xPos>0</xPos>
|
||||
<yPos>0</yPos>
|
||||
</MaxPosition>
|
||||
<NormalPosition>
|
||||
<Top>0</Top>
|
||||
<Left>0</Left>
|
||||
<Right>0</Right>
|
||||
<Bottom>0</Bottom>
|
||||
</NormalPosition>
|
||||
</WindowPosition>
|
||||
</AlienFiles>
|
||||
|
||||
<MDIGroups>
|
||||
<Orientation>1</Orientation>
|
||||
<ActiveMDIGroup>0</ActiveMDIGroup>
|
||||
<MDIGroup>
|
||||
<Size>100</Size>
|
||||
<ActiveTab>0</ActiveTab>
|
||||
<Documents>
|
||||
<Doc>
|
||||
<Name>.\rtconfig.h</Name>
|
||||
<ColumnNumber>2</ColumnNumber>
|
||||
<TopLine>60</TopLine>
|
||||
<CurrentLine>66</CurrentLine>
|
||||
</Doc>
|
||||
</Documents>
|
||||
</MDIGroup>
|
||||
</MDIGroups>
|
||||
|
||||
</ProjectOpt>
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@
|
|||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\obj\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
|
|
@ -160,10 +160,10 @@
|
|||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4102</DriverSelection>
|
||||
<DriverSelection>4099</DriverSelection>
|
||||
</Flash1>
|
||||
<Flash2>Segger\JL2CM3.dll</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
|
|
@ -436,25 +436,15 @@
|
|||
<Group>
|
||||
<GroupName>FM3</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cpuport.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\fm3\cpuport.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>context_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\fm3\context_rvds.S</FilePath>
|
||||
<FilePath>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fault_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\fm3\fault_rvds.S</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>start_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\fm3\start_rvds.S</FilePath>
|
||||
<FileName>cpuport.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
|
|
@ -471,6 +461,11 @@
|
|||
<FileType>1</FileType>
|
||||
<FilePath>..\CMSIS\system_mb9bf50x.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>start_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\CMSIS\start_rvds.S</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='fm3'
|
||||
CPU='cortex-m3'
|
||||
CROSS_TOOL='iar'
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
|
|
@ -57,7 +57,7 @@ elif PLATFORM == 'armcc':
|
|||
DEVICE = ' --device DARMSTM'
|
||||
CFLAGS = DEVICE + ' --apcs=interwork'
|
||||
AFLAGS = DEVICE
|
||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter stm32_rom.sct'
|
||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-fm3.map --scatter fm3_rom.sct'
|
||||
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
|
||||
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1744,6 +1744,9 @@
|
|||
<file>
|
||||
<name>$PROJ_DIR$\..\CMSIS\core_cm3.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\CMSIS\start_iar.S</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\CMSIS\system_mb9bf50x.c</name>
|
||||
</file>
|
||||
|
|
@ -1814,16 +1817,10 @@
|
|||
<group>
|
||||
<name>FM3</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\context_iar.S</name>
|
||||
<name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\context_iar.S</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\cpuport.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\fault_iar.S</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\start_iar.S</name>
|
||||
<name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\cpuport.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='fm3'
|
||||
CPU='cortex-m3'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
|
|
|
|||
|
|
@ -1,166 +0,0 @@
|
|||
/*
|
||||
* File : context_gcc.S
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-10-11 Bernard first version
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup FM3
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
.cpu cortex-m3
|
||||
.fpu softvfp
|
||||
.syntax unified
|
||||
.thumb
|
||||
.text
|
||||
|
||||
.equ NVIC_INT_CTRL, 0xE000ED04 /* interrupt control state register */
|
||||
.equ NVIC_SYSPRI2, 0xE000ED20 /* system priority register (2) */
|
||||
.equ NVIC_PENDSV_PRI, 0x00FF0000 /* PendSV priority value (lowest) */
|
||||
.equ NVIC_PENDSVSET, 0x10000000 /* value to trigger PendSV exception */
|
||||
|
||||
/*
|
||||
* rt_base_t rt_hw_interrupt_disable();
|
||||
*/
|
||||
.global rt_hw_interrupt_disable
|
||||
.type rt_hw_interrupt_disable, %function
|
||||
rt_hw_interrupt_disable:
|
||||
MRS r0, PRIMASK
|
||||
CPSID I
|
||||
BX LR
|
||||
|
||||
/*
|
||||
* void rt_hw_interrupt_enable(rt_base_t level);
|
||||
*/
|
||||
.global rt_hw_interrupt_enable
|
||||
.type rt_hw_interrupt_enable, %function
|
||||
rt_hw_interrupt_enable:
|
||||
MSR PRIMASK, r0
|
||||
BX LR
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
|
||||
* r0 --> from
|
||||
* r1 --> to
|
||||
*/
|
||||
.global rt_hw_context_switch_interrupt
|
||||
.type rt_hw_context_switch_interrupt, %function
|
||||
.global rt_hw_context_switch
|
||||
.type rt_hw_context_switch, %function
|
||||
|
||||
rt_hw_context_switch_interrupt:
|
||||
rt_hw_context_switch:
|
||||
/* set rt_thread_switch_interrupt_flag to 1 */
|
||||
LDR r2, =rt_thread_switch_interrupt_flag
|
||||
LDR r3, [r2]
|
||||
CMP r3, #1
|
||||
BEQ _reswitch
|
||||
MOV r3, #1
|
||||
STR r3, [r2]
|
||||
|
||||
LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */
|
||||
STR r0, [r2]
|
||||
|
||||
_reswitch:
|
||||
LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */
|
||||
STR r1, [r2]
|
||||
|
||||
LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
|
||||
LDR r1, =NVIC_PENDSVSET
|
||||
STR r1, [r0]
|
||||
BX LR
|
||||
|
||||
/* r0 --> swith from thread stack
|
||||
* r1 --> swith to thread stack
|
||||
* psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
|
||||
*/
|
||||
.global rt_hw_pend_sv
|
||||
.type rt_hw_pend_sv, %function
|
||||
rt_hw_pend_sv:
|
||||
/* disable interrupt to protect context switch */
|
||||
MRS r2, PRIMASK
|
||||
CPSID I
|
||||
|
||||
/* get rt_thread_switch_interrupt_flag */
|
||||
LDR r0, =rt_thread_switch_interrupt_flag
|
||||
LDR r1, [r0]
|
||||
CBZ r1, pendsv_exit /* pendsv already handled */
|
||||
|
||||
/* clear rt_thread_switch_interrupt_flag to 0 */
|
||||
MOV r1, #0x00
|
||||
STR r1, [r0]
|
||||
|
||||
LDR r0, =rt_interrupt_from_thread
|
||||
LDR r1, [r0]
|
||||
CBZ r1, swtich_to_thread /* skip register save at the first time */
|
||||
|
||||
MRS r1, psp /* get from thread stack pointer */
|
||||
STMFD r1!, {r4 - r11} /* push r4 - r11 register */
|
||||
LDR r0, [r0]
|
||||
STR r1, [r0] /* update from thread stack pointer */
|
||||
|
||||
swtich_to_thread:
|
||||
LDR r1, =rt_interrupt_to_thread
|
||||
LDR r1, [r1]
|
||||
LDR r1, [r1] /* load thread stack pointer */
|
||||
|
||||
LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
|
||||
MSR psp, r1 /* update stack pointer */
|
||||
|
||||
pendsv_exit:
|
||||
/* restore interrupt */
|
||||
MSR PRIMASK, r2
|
||||
|
||||
ORR lr, lr, #0x04
|
||||
BX lr
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch_to(rt_uint32 to);
|
||||
* r0 --> to
|
||||
*/
|
||||
.global rt_hw_context_switch_to
|
||||
.type rt_hw_context_switch_to, %function
|
||||
rt_hw_context_switch_to:
|
||||
LDR r1, =rt_interrupt_to_thread
|
||||
STR r0, [r1]
|
||||
|
||||
/* set from thread to 0 */
|
||||
LDR r1, =rt_interrupt_from_thread
|
||||
MOV r0, #0x0
|
||||
STR r0, [r1]
|
||||
|
||||
/* set interrupt flag to 1 */
|
||||
LDR r1, =rt_thread_switch_interrupt_flag
|
||||
MOV r0, #1
|
||||
STR r0, [r1]
|
||||
|
||||
/* set the PendSV exception priority */
|
||||
LDR r0, =NVIC_SYSPRI2
|
||||
LDR r1, =NVIC_PENDSV_PRI
|
||||
LDR.W r2, [r0,#0x00] /* read */
|
||||
ORR r1,r1,r2 /* modify */
|
||||
STR r1, [r0] /* write-back */
|
||||
|
||||
LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
|
||||
LDR r1, =NVIC_PENDSVSET
|
||||
STR r1, [r0]
|
||||
|
||||
CPSIE I /* enable interrupts at processor level */
|
||||
|
||||
/* never reach here! */
|
||||
|
||||
/* compatible with old version */
|
||||
.global rt_hw_interrupt_thread_switch
|
||||
.type rt_hw_interrupt_thread_switch, %function
|
||||
rt_hw_interrupt_thread_switch:
|
||||
BX lr
|
||||
NOP
|
||||
|
|
@ -1,163 +0,0 @@
|
|||
;/*
|
||||
; * File : context_iar.S
|
||||
; * This file is part of RT-Thread RTOS
|
||||
; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
|
||||
; *
|
||||
; * The license and distribution terms for this file may be
|
||||
; * found in the file LICENSE in this distribution or at
|
||||
; * http://www.rt-thread.org/license/LICENSE
|
||||
; *
|
||||
; * Change Logs:
|
||||
; * Date Author Notes
|
||||
; * 2009-01-17 Bernard first version
|
||||
; * 2009-09-27 Bernard add protect when contex switch occurs
|
||||
; */
|
||||
|
||||
;/**
|
||||
; * @addtogroup FM3
|
||||
; */
|
||||
;/*@{*/
|
||||
|
||||
NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
|
||||
NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
|
||||
NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
|
||||
NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
|
||||
|
||||
SECTION .text:CODE(2)
|
||||
THUMB
|
||||
REQUIRE8
|
||||
PRESERVE8
|
||||
|
||||
IMPORT rt_thread_switch_interrupt_flag
|
||||
IMPORT rt_interrupt_from_thread
|
||||
IMPORT rt_interrupt_to_thread
|
||||
|
||||
;/*
|
||||
; * rt_base_t rt_hw_interrupt_disable();
|
||||
; */
|
||||
EXPORT rt_hw_interrupt_disable
|
||||
rt_hw_interrupt_disable:
|
||||
MRS r0, PRIMASK
|
||||
CPSID I
|
||||
BX LR
|
||||
|
||||
;/*
|
||||
; * void rt_hw_interrupt_enable(rt_base_t level);
|
||||
; */
|
||||
EXPORT rt_hw_interrupt_enable
|
||||
rt_hw_interrupt_enable:
|
||||
MSR PRIMASK, r0
|
||||
BX LR
|
||||
|
||||
;/*
|
||||
; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
|
||||
; * r0 --> from
|
||||
; * r1 --> to
|
||||
; */
|
||||
EXPORT rt_hw_context_switch_interrupt
|
||||
EXPORT rt_hw_context_switch
|
||||
rt_hw_context_switch_interrupt:
|
||||
rt_hw_context_switch:
|
||||
; set rt_thread_switch_interrupt_flag to 1
|
||||
LDR r2, =rt_thread_switch_interrupt_flag
|
||||
LDR r3, [r2]
|
||||
CMP r3, #1
|
||||
BEQ _reswitch
|
||||
MOV r3, #1
|
||||
STR r3, [r2]
|
||||
|
||||
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
|
||||
STR r0, [r2]
|
||||
|
||||
_reswitch
|
||||
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
|
||||
STR r1, [r2]
|
||||
|
||||
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
|
||||
LDR r1, =NVIC_PENDSVSET
|
||||
STR r1, [r0]
|
||||
BX LR
|
||||
|
||||
; r0 --> swith from thread stack
|
||||
; r1 --> swith to thread stack
|
||||
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
|
||||
EXPORT rt_hw_pend_sv
|
||||
rt_hw_pend_sv:
|
||||
|
||||
; disable interrupt to protect context switch
|
||||
MRS r2, PRIMASK
|
||||
CPSID I
|
||||
|
||||
; get rt_thread_switch_interrupt_flag
|
||||
LDR r0, =rt_thread_switch_interrupt_flag
|
||||
LDR r1, [r0]
|
||||
CBZ r1, pendsv_exit ; pendsv already handled
|
||||
|
||||
; clear rt_thread_switch_interrupt_flag to 0
|
||||
MOV r1, #0x00
|
||||
STR r1, [r0]
|
||||
|
||||
LDR r0, =rt_interrupt_from_thread
|
||||
LDR r1, [r0]
|
||||
CBZ r1, swtich_to_thread ; skip register save at the first time
|
||||
|
||||
MRS r1, psp ; get from thread stack pointer
|
||||
STMFD r1!, {r4 - r11} ; push r4 - r11 register
|
||||
LDR r0, [r0]
|
||||
STR r1, [r0] ; update from thread stack pointer
|
||||
|
||||
swtich_to_thread
|
||||
LDR r1, =rt_interrupt_to_thread
|
||||
LDR r1, [r1]
|
||||
LDR r1, [r1] ; load thread stack pointer
|
||||
|
||||
LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
|
||||
MSR psp, r1 ; update stack pointer
|
||||
|
||||
pendsv_exit
|
||||
; restore interrupt
|
||||
MSR PRIMASK, r2
|
||||
|
||||
ORR lr, lr, #0x04
|
||||
BX lr
|
||||
|
||||
;/*
|
||||
; * void rt_hw_context_switch_to(rt_uint32 to);
|
||||
; * r0 --> to
|
||||
; */
|
||||
EXPORT rt_hw_context_switch_to
|
||||
rt_hw_context_switch_to:
|
||||
LDR r1, =rt_interrupt_to_thread
|
||||
STR r0, [r1]
|
||||
|
||||
; set from thread to 0
|
||||
LDR r1, =rt_interrupt_from_thread
|
||||
MOV r0, #0x0
|
||||
STR r0, [r1]
|
||||
|
||||
; set interrupt flag to 1
|
||||
LDR r1, =rt_thread_switch_interrupt_flag
|
||||
MOV r0, #1
|
||||
STR r0, [r1]
|
||||
|
||||
; set the PendSV exception priority
|
||||
LDR r0, =NVIC_SYSPRI2
|
||||
LDR r1, =NVIC_PENDSV_PRI
|
||||
LDR.W r2, [r0,#0x00] ; read
|
||||
ORR r1,r1,r2 ; modify
|
||||
STR r1, [r0] ; write-back
|
||||
|
||||
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
|
||||
LDR r1, =NVIC_PENDSVSET
|
||||
STR r1, [r0]
|
||||
|
||||
CPSIE I ; enable interrupts at processor level
|
||||
|
||||
; never reach here!
|
||||
|
||||
; compatible with old version
|
||||
EXPORT rt_hw_interrupt_thread_switch
|
||||
rt_hw_interrupt_thread_switch:
|
||||
BX lr
|
||||
|
||||
END
|
||||
|
|
@ -1,162 +0,0 @@
|
|||
;/*
|
||||
; * File : context_rvds.S
|
||||
; * This file is part of RT-Thread RTOS
|
||||
; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
|
||||
; *
|
||||
; * The license and distribution terms for this file may be
|
||||
; * found in the file LICENSE in this distribution or at
|
||||
; * http://www.rt-thread.org/license/LICENSE
|
||||
; *
|
||||
; * Change Logs:
|
||||
; * Date Author Notes
|
||||
; * 2011-02-23 Bernard first version
|
||||
; */
|
||||
|
||||
NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
|
||||
NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
|
||||
NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
|
||||
NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
|
||||
|
||||
AREA |.text|, CODE, READONLY, ALIGN=2
|
||||
THUMB
|
||||
REQUIRE8
|
||||
PRESERVE8
|
||||
|
||||
IMPORT rt_thread_switch_interrupt_flag
|
||||
IMPORT rt_interrupt_from_thread
|
||||
IMPORT rt_interrupt_to_thread
|
||||
|
||||
;/*
|
||||
; * rt_base_t rt_hw_interrupt_disable();
|
||||
; */
|
||||
rt_hw_interrupt_disable PROC
|
||||
EXPORT rt_hw_interrupt_disable
|
||||
MRS r0, PRIMASK
|
||||
CPSID I
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;/*
|
||||
; * void rt_hw_interrupt_enable(rt_base_t level);
|
||||
; */
|
||||
rt_hw_interrupt_enable PROC
|
||||
EXPORT rt_hw_interrupt_enable
|
||||
MSR PRIMASK, r0
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;/*
|
||||
; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
|
||||
; * r0 --> from
|
||||
; * r1 --> to
|
||||
; */
|
||||
rt_hw_context_switch_interrupt
|
||||
EXPORT rt_hw_context_switch_interrupt
|
||||
rt_hw_context_switch PROC
|
||||
EXPORT rt_hw_context_switch
|
||||
|
||||
; set rt_thread_switch_interrupt_flag to 1
|
||||
LDR r2, =rt_thread_switch_interrupt_flag
|
||||
LDR r3, [r2]
|
||||
CMP r3, #1
|
||||
BEQ _reswitch
|
||||
MOV r3, #1
|
||||
STR r3, [r2]
|
||||
|
||||
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
|
||||
STR r0, [r2]
|
||||
|
||||
_reswitch
|
||||
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
|
||||
STR r1, [r2]
|
||||
|
||||
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
|
||||
LDR r1, =NVIC_PENDSVSET
|
||||
STR r1, [r0]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
; r0 --> swith from thread stack
|
||||
; r1 --> swith to thread stack
|
||||
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
|
||||
rt_hw_pend_sv PROC
|
||||
EXPORT rt_hw_pend_sv
|
||||
|
||||
; disable interrupt to protect context switch
|
||||
MRS r2, PRIMASK
|
||||
CPSID I
|
||||
|
||||
; get rt_thread_switch_interrupt_flag
|
||||
LDR r0, =rt_thread_switch_interrupt_flag
|
||||
LDR r1, [r0]
|
||||
CBZ r1, pendsv_exit ; pendsv already handled
|
||||
|
||||
; clear rt_thread_switch_interrupt_flag to 0
|
||||
MOV r1, #0x00
|
||||
STR r1, [r0]
|
||||
|
||||
LDR r0, =rt_interrupt_from_thread
|
||||
LDR r1, [r0]
|
||||
CBZ r1, swtich_to_thread ; skip register save at the first time
|
||||
|
||||
MRS r1, psp ; get from thread stack pointer
|
||||
STMFD r1!, {r4 - r11} ; push r4 - r11 register
|
||||
LDR r0, [r0]
|
||||
STR r1, [r0] ; update from thread stack pointer
|
||||
|
||||
swtich_to_thread
|
||||
LDR r1, =rt_interrupt_to_thread
|
||||
LDR r1, [r1]
|
||||
LDR r1, [r1] ; load thread stack pointer
|
||||
|
||||
LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
|
||||
MSR psp, r1 ; update stack pointer
|
||||
|
||||
pendsv_exit
|
||||
; restore interrupt
|
||||
MSR PRIMASK, r2
|
||||
|
||||
ORR lr, lr, #0x04
|
||||
BX lr
|
||||
ENDP
|
||||
|
||||
;/*
|
||||
; * void rt_hw_context_switch_to(rt_uint32 to);
|
||||
; * r0 --> to
|
||||
; * this fucntion is used to perform the first thread switch
|
||||
; */
|
||||
rt_hw_context_switch_to PROC
|
||||
EXPORT rt_hw_context_switch_to
|
||||
; set to thread
|
||||
LDR r1, =rt_interrupt_to_thread
|
||||
STR r0, [r1]
|
||||
|
||||
; set from thread to 0
|
||||
LDR r1, =rt_interrupt_from_thread
|
||||
MOV r0, #0x0
|
||||
STR r0, [r1]
|
||||
|
||||
; set interrupt flag to 1
|
||||
LDR r1, =rt_thread_switch_interrupt_flag
|
||||
MOV r0, #1
|
||||
STR r0, [r1]
|
||||
|
||||
; set the PendSV exception priority
|
||||
LDR r0, =NVIC_SYSPRI2
|
||||
LDR r1, =NVIC_PENDSV_PRI
|
||||
LDR.W r2, [r0,#0x00] ; read
|
||||
ORR r1,r1,r2 ; modify
|
||||
STR r1, [r0] ; write-back
|
||||
|
||||
; trigger the PendSV exception (causes context switch)
|
||||
LDR r0, =NVIC_INT_CTRL
|
||||
LDR r1, =NVIC_PENDSVSET
|
||||
STR r1, [r0]
|
||||
|
||||
; enable interrupts at processor level
|
||||
CPSIE I
|
||||
|
||||
; never reach here!
|
||||
ENDP
|
||||
|
||||
END
|
||||
|
|
@ -1,122 +0,0 @@
|
|||
/*
|
||||
* File : cpuport.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2011-02-23 Bernard the first version
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "mb9bf506r.h"
|
||||
#include "core_cm3.h"
|
||||
|
||||
/* switch flag on interrupt and thread pointer to save switch record */
|
||||
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
|
||||
rt_uint32_t rt_thread_switch_interrupt_flag;
|
||||
|
||||
/* stack context in ARM Cortex-M3 */
|
||||
struct stack_context
|
||||
{
|
||||
rt_uint32_t r0;
|
||||
rt_uint32_t r1;
|
||||
rt_uint32_t r2;
|
||||
rt_uint32_t r3;
|
||||
rt_uint32_t r12;
|
||||
rt_uint32_t lr;
|
||||
rt_uint32_t pc;
|
||||
rt_uint32_t psr;
|
||||
};
|
||||
|
||||
extern void rt_hw_interrupt_thread_switch(void);
|
||||
extern void list_thread(void);
|
||||
extern rt_thread_t rt_current_thread;
|
||||
void rt_hw_hard_fault_exception(struct stack_context* contex)
|
||||
{
|
||||
rt_kprintf("psr: 0x%08x\n", contex->psr);
|
||||
rt_kprintf(" pc: 0x%08x\n", contex->pc);
|
||||
rt_kprintf(" lr: 0x%08x\n", contex->lr);
|
||||
rt_kprintf("r12: 0x%08x\n", contex->r12);
|
||||
rt_kprintf("r03: 0x%08x\n", contex->r3);
|
||||
rt_kprintf("r02: 0x%08x\n", contex->r2);
|
||||
rt_kprintf("r01: 0x%08x\n", contex->r1);
|
||||
rt_kprintf("r00: 0x%08x\n", contex->r0);
|
||||
|
||||
if (rt_current_thread != RT_NULL)
|
||||
{
|
||||
rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
|
||||
#ifdef RT_USING_FINSH
|
||||
list_thread();
|
||||
#endif
|
||||
while (1);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("hard fault on initialization\n");
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* reset MCU
|
||||
*
|
||||
*/
|
||||
void rt_hw_cpu_reset()
|
||||
{
|
||||
NVIC_SystemReset();
|
||||
}
|
||||
|
||||
/**
|
||||
* shutdown CPU
|
||||
*
|
||||
*/
|
||||
void rt_hw_cpu_shutdown()
|
||||
{
|
||||
rt_kprintf("shutdown...\n");
|
||||
|
||||
RT_ASSERT(0);
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will initialize thread stack
|
||||
*
|
||||
* @param tentry the entry of thread
|
||||
* @param parameter the parameter of entry
|
||||
* @param stack_addr the beginning stack address
|
||||
* @param texit the function will be called when thread exit
|
||||
*
|
||||
* @return stack address
|
||||
*/
|
||||
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
|
||||
rt_uint8_t *stack_addr, void *texit)
|
||||
{
|
||||
unsigned long *stk;
|
||||
|
||||
stk = (unsigned long *)stack_addr;
|
||||
*(stk) = 0x01000000L; /* PSR */
|
||||
*(--stk) = (unsigned long)tentry; /* entry point, pc */
|
||||
*(--stk) = (unsigned long)texit; /* lr */
|
||||
*(--stk) = 0; /* r12 */
|
||||
*(--stk) = 0; /* r3 */
|
||||
*(--stk) = 0; /* r2 */
|
||||
*(--stk) = 0; /* r1 */
|
||||
*(--stk) = (unsigned long)parameter; /* r0 : argument */
|
||||
|
||||
*(--stk) = 0; /* r11 */
|
||||
*(--stk) = 0; /* r10 */
|
||||
*(--stk) = 0; /* r9 */
|
||||
*(--stk) = 0; /* r8 */
|
||||
*(--stk) = 0; /* r7 */
|
||||
*(--stk) = 0; /* r6 */
|
||||
*(--stk) = 0; /* r5 */
|
||||
*(--stk) = 0; /* r4 */
|
||||
|
||||
/* return task's current stack address */
|
||||
return (rt_uint8_t *)stk;
|
||||
}
|
||||
|
|
@ -1,31 +0,0 @@
|
|||
/*
|
||||
* File : fault_gcc.S
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-10-11 Bernard first version
|
||||
*/
|
||||
|
||||
.cpu cortex-m3
|
||||
.fpu softvfp
|
||||
.syntax unified
|
||||
.thumb
|
||||
.text
|
||||
|
||||
.global rt_hw_hard_fault
|
||||
.type rt_hw_hard_fault, %function
|
||||
rt_hw_hard_fault:
|
||||
/* get current context */
|
||||
MRS r0, psp /* get fault thread stack pointer */
|
||||
PUSH {lr}
|
||||
BL rt_hw_hard_fault_exception
|
||||
POP {lr}
|
||||
|
||||
ORR lr, lr, #0x04
|
||||
BX lr
|
||||
|
|
@ -1,34 +0,0 @@
|
|||
;/*
|
||||
; * File : fault_iar.S
|
||||
; * This file is part of RT-Thread RTOS
|
||||
; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
|
||||
; *
|
||||
; * The license and distribution terms for this file may be
|
||||
; * found in the file LICENSE in this distribution or at
|
||||
; * http://www.rt-thread.org/license/LICENSE
|
||||
; *
|
||||
; * Change Logs:
|
||||
; * Date Author Notes
|
||||
; * 2009-01-17 Bernard first version
|
||||
; */
|
||||
|
||||
SECTION .text:CODE(2)
|
||||
THUMB
|
||||
REQUIRE8
|
||||
PRESERVE8
|
||||
|
||||
IMPORT rt_hw_hard_fault_exception
|
||||
|
||||
EXPORT rt_hw_hard_fault
|
||||
rt_hw_hard_fault:
|
||||
|
||||
; get current context
|
||||
MRS r0, psp ; get fault thread stack pointer
|
||||
PUSH {lr}
|
||||
BL rt_hw_hard_fault_exception
|
||||
POP {lr}
|
||||
|
||||
ORR lr, lr, #0x04
|
||||
BX lr
|
||||
|
||||
END
|
||||
|
|
@ -1,35 +0,0 @@
|
|||
;/*
|
||||
; * File : fault_rvds.S
|
||||
; * This file is part of RT-Thread RTOS
|
||||
; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
|
||||
; *
|
||||
; * The license and distribution terms for this file may be
|
||||
; * found in the file LICENSE in this distribution or at
|
||||
; * http://www.rt-thread.org/license/LICENSE
|
||||
; *
|
||||
; * Change Logs:
|
||||
; * Date Author Notes
|
||||
; * 2011-02-23 Bernard first version
|
||||
; */
|
||||
|
||||
AREA |.text|, CODE, READONLY, ALIGN=2
|
||||
THUMB
|
||||
REQUIRE8
|
||||
PRESERVE8
|
||||
|
||||
IMPORT rt_hw_hard_fault_exception
|
||||
|
||||
rt_hw_hard_fault PROC
|
||||
EXPORT rt_hw_hard_fault
|
||||
|
||||
; get current context
|
||||
MRS r0, psp ; get fault thread stack pointer
|
||||
PUSH {lr}
|
||||
BL rt_hw_hard_fault_exception
|
||||
POP {lr}
|
||||
|
||||
ORR lr, lr, #0x04
|
||||
BX lr
|
||||
ENDP
|
||||
|
||||
END
|
||||
Loading…
Reference in New Issue