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all FM3 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/fm3 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1861 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
dzzxzz 2011-12-22 00:46:34 +00:00
parent 70a7964f2c
commit d6892fb441
20 changed files with 2147 additions and 2480 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
bsp/fm3/CMSIS/SConscript
View File

@ -3,6 +3,15 @@ Import('rtconfig')
from building import * from building import *
src = Glob('*.c') src = Glob('*.c')
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
src = src + ['start_gcc.S']
elif rtconfig.CROSS_TOOL == 'keil':
src = src + ['start_rvds.S']
elif rtconfig.CROSS_TOOL == 'iar':
src = src + ['start_iar.S']
CPPPATH = [GetCurrentDir()] CPPPATH = [GetCurrentDir()]
group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH, LIBRARY = '') group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH, LIBRARY = '')

17
libcpu/arm/fm3/start_gcc.S → bsp/fm3/CMSIS/start_gcc.S
View File

@ -116,7 +116,7 @@ g_pfnVectors:
.word Initial_spTop .word Initial_spTop
.word Reset_Handler .word Reset_Handler
.word NMI_Handler .word NMI_Handler
.word rt_hw_hard_fault .word HardFault_Handler
.word MemManage_Handler .word MemManage_Handler
.word BusFault_Handler .word BusFault_Handler
.word UsageFault_Handler .word UsageFault_Handler
@ -127,8 +127,8 @@ g_pfnVectors:
.word SVC_Handler .word SVC_Handler
.word DebugMon_Handler .word DebugMon_Handler
.word 0 .word 0
.word rt_hw_pend_sv .word PendSV_Handler
.word rt_hw_timer_handler .word SysTick_Handler
.word CSV_IRQHandler .word CSV_IRQHandler
.word SWDT_IRQHandler .word SWDT_IRQHandler
@ -189,7 +189,10 @@ g_pfnVectors:
.weak NMI_Handler .weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler .thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler .weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler .thumb_set MemManage_Handler,Default_Handler
@ -205,6 +208,12 @@ g_pfnVectors:
.weak DebugMon_Handler .weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler .thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak CSV_IRQHandler .weak CSV_IRQHandler
.thumb_set CSV_IRQHandler,Default_Handler .thumb_set CSV_IRQHandler,Default_Handler

21
libcpu/arm/fm3/start_iar.S → bsp/fm3/CMSIS/start_iar.S
View File

@ -23,9 +23,6 @@
SECTION CSTACK:DATA:NOROOT(3) SECTION CSTACK:DATA:NOROOT(3)
SECTION .icode:CODE:NOROOT(2) SECTION .icode:CODE:NOROOT(2)
IMPORT rt_hw_hard_fault
IMPORT rt_hw_pend_sv
IMPORT rt_hw_timer_handler
#ifdef RT_USING_UART2 #ifdef RT_USING_UART2
IMPORT MFS2RX_IRQHandler IMPORT MFS2RX_IRQHandler
#endif #endif
@ -60,7 +57,7 @@ __vector_table
DCD __iar_program_start DCD __iar_program_start
DCD NMI_Handler ; NMI Handler DCD NMI_Handler ; NMI Handler
DCD rt_hw_hard_fault ; Hard Fault Handler DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler DCD UsageFault_Handler ; Usage Fault Handler
@ -71,8 +68,8 @@ __vector_table
DCD SVC_Handler ; SVCall Handler DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved DCD 0 ; Reserved
DCD rt_hw_pend_sv ; PendSV Handler DCD PendSV_Handler ; PendSV Handler
DCD rt_hw_timer_handler ; SysTick Handler DCD SysTick_Handler ; SysTick Handler
; External Interrupts ; External Interrupts
DCD CSV_IRQHandler ; Clock Super Visor DCD CSV_IRQHandler ; Clock Super Visor
@ -138,6 +135,10 @@ __vector_table
SECTION .text:CODE:REORDER(1) SECTION .text:CODE:REORDER(1)
NMI_Handler NMI_Handler
B NMI_Handler B NMI_Handler
PUBWEAK HardFault_Handler
SECTION .text:CODE:REORDER(1)
HardFault_Handler
B HardFault_Handler
PUBWEAK MemManage_Handler PUBWEAK MemManage_Handler
SECTION .text:CODE:REORDER(1) SECTION .text:CODE:REORDER(1)
MemManage_Handler MemManage_Handler
@ -158,6 +159,14 @@ SVC_Handler
SECTION .text:CODE:REORDER(1) SECTION .text:CODE:REORDER(1)
DebugMon_Handler DebugMon_Handler
B DebugMon_Handler B DebugMon_Handler
PUBWEAK PendSV_Handler
SECTION .text:CODE:REORDER(1)
PendSV_Handler
B PendSV_Handler
PUBWEAK SysTick_Handler
SECTION .text:CODE:REORDER(1)
SysTick_Handler
B SysTick_Handler
PUBWEAK CSV_IRQHandler PUBWEAK CSV_IRQHandler
SECTION .text:CODE:REORDER(1) SECTION .text:CODE:REORDER(1)
CSV_IRQHandler CSV_IRQHandler

138
libcpu/arm/fm3/start_rvds.S → bsp/fm3/CMSIS/start_rvds.S
View File

@ -37,10 +37,6 @@ __heap_limit
PRESERVE8 PRESERVE8
THUMB THUMB
IMPORT rt_hw_hard_fault
IMPORT rt_hw_pend_sv
IMPORT rt_hw_timer_handler
; Vector Table Mapped to Address 0 at Reset ; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY AREA RESET, DATA, READONLY
EXPORT __Vectors EXPORT __Vectors
@ -48,70 +44,70 @@ __heap_limit
EXPORT __Vectors_Size EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack __Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler DCD NMI_Handler ; NMI Handler
DCD rt_hw_hard_fault ; Hard Fault Handler DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved DCD 0 ; Reserved
DCD 0 ; Reserved DCD 0 ; Reserved
DCD 0 ; Reserved DCD 0 ; Reserved
DCD 0 ; Reserved DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved DCD 0 ; Reserved
DCD rt_hw_pend_sv ; PendSV Handler DCD PendSV_Handler ; PendSV Handler
DCD rt_hw_timer_handler ; SysTick Handler DCD SysTick_Handler ; SysTick Handler
DCD CSV_Handler ; 0: Clock Super Visor DCD CSV_Handler ; 0: Clock Super Visor
DCD SWDT_Handler ; 1: Software Watchdog Timer DCD SWDT_Handler ; 1: Software Watchdog Timer
DCD LVD_Handler ; 2: Low Voltage Detector DCD LVD_Handler ; 2: Low Voltage Detector
DCD MFT_WG_IRQHandler ; 3: Wave Form Generator / DTIF DCD MFT_WG_IRQHandler ; 3: Wave Form Generator / DTIF
DCD INT0_7_Handler ; 4: External Interrupt Request ch.0 to ch.7 DCD INT0_7_Handler ; 4: External Interrupt Request ch.0 to ch.7
DCD INT8_15_Handler ; 5: External Interrupt Request ch.8 to ch.15 DCD INT8_15_Handler ; 5: External Interrupt Request ch.8 to ch.15
DCD DT_Handler ; 6: Dual Timer / Quad Decoder DCD DT_Handler ; 6: Dual Timer / Quad Decoder
DCD MFS0RX_IRQHandler ; 7: MultiFunction Serial ch.0 DCD MFS0RX_IRQHandler ; 7: MultiFunction Serial ch.0
DCD MFS0TX_IRQHandler ; 8: MultiFunction Serial ch.0 DCD MFS0TX_IRQHandler ; 8: MultiFunction Serial ch.0
DCD MFS1RX_IRQHandler ; 9: MultiFunction Serial ch.1 DCD MFS1RX_IRQHandler ; 9: MultiFunction Serial ch.1
DCD MFS1TX_IRQHandler ; 10: MultiFunction Serial ch.1 DCD MFS1TX_IRQHandler ; 10: MultiFunction Serial ch.1
DCD MFS2RX_IRQHandler ; 11: MultiFunction Serial ch.2 DCD MFS2RX_IRQHandler ; 11: MultiFunction Serial ch.2
DCD MFS2TX_IRQHandler ; 12: MultiFunction Serial ch.2 DCD MFS2TX_IRQHandler ; 12: MultiFunction Serial ch.2
DCD MFS3RX_IRQHandler ; 13: MultiFunction Serial ch.3 DCD MFS3RX_IRQHandler ; 13: MultiFunction Serial ch.3
DCD MFS3TX_IRQHandler ; 14: MultiFunction Serial ch.3 DCD MFS3TX_IRQHandler ; 14: MultiFunction Serial ch.3
DCD MFS4RX_IRQHandler ; 15: MultiFunction Serial ch.4 DCD MFS4RX_IRQHandler ; 15: MultiFunction Serial ch.4
DCD MFS4TX_IRQHandler ; 16: MultiFunction Serial ch.4 DCD MFS4TX_IRQHandler ; 16: MultiFunction Serial ch.4
DCD MFS5RX_IRQHandler ; 17: MultiFunction Serial ch.5 DCD MFS5RX_IRQHandler ; 17: MultiFunction Serial ch.5
DCD MFS5TX_IRQHandler ; 18: MultiFunction Serial ch.5 DCD MFS5TX_IRQHandler ; 18: MultiFunction Serial ch.5
DCD MFS6RX_IRQHandler ; 19: MultiFunction Serial ch.6 DCD MFS6RX_IRQHandler ; 19: MultiFunction Serial ch.6
DCD MFS6TX_IRQHandler ; 20: MultiFunction Serial ch.6 DCD MFS6TX_IRQHandler ; 20: MultiFunction Serial ch.6
DCD MFS7RX_IRQHandler ; 21: MultiFunction Serial ch.7 DCD MFS7RX_IRQHandler ; 21: MultiFunction Serial ch.7
DCD MFS7TX_IRQHandler ; 22: MultiFunction Serial ch.7 DCD MFS7TX_IRQHandler ; 22: MultiFunction Serial ch.7
DCD PPG_Handler ; 23: PPG DCD PPG_Handler ; 23: PPG
DCD TIM_IRQHandler ; 24: OSC / PLL / Watch Counter DCD TIM_IRQHandler ; 24: OSC / PLL / Watch Counter
DCD ADC0_IRQHandler ; 25: ADC0 DCD ADC0_IRQHandler ; 25: ADC0
DCD ADC1_IRQHandler ; 26: ADC1 DCD ADC1_IRQHandler ; 26: ADC1
DCD ADC2_IRQHandler ; 27: ADC2 DCD ADC2_IRQHandler ; 27: ADC2
DCD MFT_FRT_IRQHandler ; 28: Free-run Timer DCD MFT_FRT_IRQHandler ; 28: Free-run Timer
DCD MFT_IPC_IRQHandler ; 29: Input Capture DCD MFT_IPC_IRQHandler ; 29: Input Capture
DCD MFT_OPC_IRQHandler ; 30: Output Compare DCD MFT_OPC_IRQHandler ; 30: Output Compare
DCD BT_IRQHandler ; 31: Base Timer ch.0 to ch.7 DCD BT_IRQHandler ; 31: Base Timer ch.0 to ch.7
DCD CAN0_IRQHandler ; 32: CAN ch.0 DCD CAN0_IRQHandler ; 32: CAN ch.0
DCD CAN1_IRQHandler ; 33: CAN ch.1 DCD CAN1_IRQHandler ; 33: CAN ch.1
DCD USBF_Handler ; 34: USB Function DCD USBF_Handler ; 34: USB Function
DCD USB_Handler ; 35: USB Function / USB HOST DCD USB_Handler ; 35: USB Function / USB HOST
DCD DummyHandler ; 36: Reserved DCD DummyHandler ; 36: Reserved
DCD DummyHandler ; 37: Reserved DCD DummyHandler ; 37: Reserved
DCD DMAC0_Handler ; 38: DMAC ch.0 DCD DMAC0_Handler ; 38: DMAC ch.0
DCD DMAC1_Handler ; 39: DMAC ch.1 DCD DMAC1_Handler ; 39: DMAC ch.1
DCD DMAC2_Handler ; 40: DMAC ch.2 DCD DMAC2_Handler ; 40: DMAC ch.2
DCD DMAC3_Handler ; 41: DMAC ch.3 DCD DMAC3_Handler ; 41: DMAC ch.3
DCD DMAC4_Handler ; 42: DMAC ch.4 DCD DMAC4_Handler ; 42: DMAC ch.4
DCD DMAC5_Handler ; 43: DMAC ch.5 DCD DMAC5_Handler ; 43: DMAC ch.5
DCD DMAC6_Handler ; 44: DMAC ch.6 DCD DMAC6_Handler ; 44: DMAC ch.6
DCD DMAC7_Handler ; 45: DMAC ch.7 DCD DMAC7_Handler ; 45: DMAC ch.7
DCD DummyHandler ; 46: Reserved DCD DummyHandler ; 46: Reserved
DCD DummyHandler ; 47: Reserved DCD DummyHandler ; 47: Reserved
__Vectors_End __Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors __Vectors_Size EQU __Vectors_End - __Vectors
@ -166,6 +162,14 @@ DebugMon_Handler\
EXPORT DebugMon_Handler [WEAK] EXPORT DebugMon_Handler [WEAK]
B . B .
ENDP ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC Default_Handler PROC

2
bsp/fm3/mb9bf500r/board.c
View File

@ -31,7 +31,7 @@ extern const uint32_t SystemFrequency;
* This is the timer interrupt service routine. * This is the timer interrupt service routine.
* *
*/ */
void rt_hw_timer_handler(void) void SysTick_Handler(void)
{ {
/* enter interrupt */ /* enter interrupt */
rt_interrupt_enter(); rt_interrupt_enter();

1998
bsp/fm3/mb9bf500r/fm3_easy_kit.dep
View File

File diff suppressed because it is too large Load Diff

15
bsp/fm3/mb9bf500r/fm3_easy_kit.ewp
View File

@ -30,7 +30,7 @@
<option> <option>
<name>Variant</name> <name>Variant</name>
<version>18</version> <version>18</version>
<state>37</state> <state>0</state>
</option> </option>
<option> <option>
<name>GEndianMode</name> <name>GEndianMode</name>
@ -99,7 +99,7 @@
</option> </option>
<option> <option>
<name>OGChipSelectEditMenu</name> <name>OGChipSelectEditMenu</name>
<state>MB9BF500R Fujitsu MB9BF500R</state> <state>Default None</state>
</option> </option>
<option> <option>
<name>GenLowLevelInterface</name> <name>GenLowLevelInterface</name>
@ -138,7 +138,7 @@
<option> <option>
<name>GFPUCoreSlave</name> <name>GFPUCoreSlave</name>
<version>18</version> <version>18</version>
<state>37</state> <state>0</state>
</option> </option>
<option> <option>
<name>GBECoreSlave</name> <name>GBECoreSlave</name>
@ -1749,16 +1749,13 @@
<group> <group>
<name>FM3</name> <name>FM3</name>
<file> <file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\context_iar.S</name> <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\context_iar.S</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\cpuport.c</name> <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\cpuport.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\fault_iar.S</name> <name>$PROJ_DIR$\..\CMSIS\start_iar.S</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\start_iar.S</name>
</file> </file>
</group> </group>
<group> <group>

161
bsp/fm3/mb9bf500r/project.uvopt
View File

@ -160,10 +160,10 @@
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>43</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>1</TopLine> <TopLine>121</TopLine>
<CurrentLine>1</CurrentLine> <CurrentLine>121</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>.\application.c</PathWithFileName> <PathWithFileName>.\application.c</PathWithFileName>
<FilenameWithoutPath>application.c</FilenameWithoutPath> <FilenameWithoutPath>application.c</FilenameWithoutPath>
@ -174,10 +174,10 @@
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>20</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine> <TopLine>32</TopLine>
<CurrentLine>0</CurrentLine> <CurrentLine>34</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>.\board.c</PathWithFileName> <PathWithFileName>.\board.c</PathWithFileName>
<FilenameWithoutPath>board.c</FilenameWithoutPath> <FilenameWithoutPath>board.c</FilenameWithoutPath>
@ -290,58 +290,30 @@
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>10</FileNumber> <FileNumber>10</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\libcpu\arm\fm3\cpuport.c</PathWithFileName>
<FilenameWithoutPath>cpuport.c</FilenameWithoutPath>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>11</FileNumber>
<FileType>2</FileType> <FileType>2</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>7</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine> <TopLine>116</TopLine>
<CurrentLine>0</CurrentLine> <CurrentLine>116</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\..\libcpu\arm\fm3\context_rvds.S</PathWithFileName> <PathWithFileName>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</PathWithFileName>
<FilenameWithoutPath>context_rvds.S</FilenameWithoutPath> <FilenameWithoutPath>context_rvds.S</FilenameWithoutPath>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>12</FileNumber> <FileNumber>11</FileNumber>
<FileType>2</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>22</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine> <TopLine>1</TopLine>
<CurrentLine>0</CurrentLine> <CurrentLine>1</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\..\libcpu\arm\fm3\fault_rvds.S</PathWithFileName> <PathWithFileName>..\..\..\libcpu\arm\cortex-m3\cpuport.c</PathWithFileName>
<FilenameWithoutPath>fault_rvds.S</FilenameWithoutPath> <FilenameWithoutPath>cpuport.c</FilenameWithoutPath>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>13</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\libcpu\arm\fm3\start_rvds.S</PathWithFileName>
<FilenameWithoutPath>start_rvds.S</FilenameWithoutPath>
</File> </File>
</Group> </Group>
@ -352,32 +324,46 @@
<cbSel>0</cbSel> <cbSel>0</cbSel>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>14</FileNumber> <FileNumber>12</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine> <TopLine>1</TopLine>
<CurrentLine>0</CurrentLine> <CurrentLine>1</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\CMSIS\core_cm3.c</PathWithFileName> <PathWithFileName>..\CMSIS\core_cm3.c</PathWithFileName>
<FilenameWithoutPath>core_cm3.c</FilenameWithoutPath> <FilenameWithoutPath>core_cm3.c</FilenameWithoutPath>
</File> </File>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>15</FileNumber> <FileNumber>13</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine> <TopLine>1</TopLine>
<CurrentLine>0</CurrentLine> <CurrentLine>1</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\CMSIS\system_mb9bf50x.c</PathWithFileName> <PathWithFileName>..\CMSIS\system_mb9bf50x.c</PathWithFileName>
<FilenameWithoutPath>system_mb9bf50x.c</FilenameWithoutPath> <FilenameWithoutPath>system_mb9bf50x.c</FilenameWithoutPath>
</File> </File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>14</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>39</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>47</TopLine>
<CurrentLine>61</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\CMSIS\start_rvds.S</PathWithFileName>
<FilenameWithoutPath>start_rvds.S</FilenameWithoutPath>
</File>
</Group> </Group>
<Group> <Group>
@ -387,7 +373,7 @@
<cbSel>0</cbSel> <cbSel>0</cbSel>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>16</FileNumber> <FileNumber>15</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -401,7 +387,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>17</FileNumber> <FileNumber>16</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -415,7 +401,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>18</FileNumber> <FileNumber>17</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -429,7 +415,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>19</FileNumber> <FileNumber>18</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -443,7 +429,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>20</FileNumber> <FileNumber>19</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -457,7 +443,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>21</FileNumber> <FileNumber>20</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -471,7 +457,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>22</FileNumber> <FileNumber>21</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -485,7 +471,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>23</FileNumber> <FileNumber>22</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -499,7 +485,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>24</FileNumber> <FileNumber>23</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -513,7 +499,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>25</FileNumber> <FileNumber>24</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -527,7 +513,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>26</FileNumber> <FileNumber>25</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -541,7 +527,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>27</FileNumber> <FileNumber>26</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -555,7 +541,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>28</FileNumber> <FileNumber>27</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -569,7 +555,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>29</FileNumber> <FileNumber>28</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -583,7 +569,7 @@
</File> </File>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>30</FileNumber> <FileNumber>29</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
@ -597,47 +583,4 @@
</File> </File>
</Group> </Group>
<AlienFiles>
<PathWithFilename>C:\Users\xxxx\Desktop\20110622\RTT\bsp\fm3\mb9bf500r\rtconfig.h</PathWithFilename>
<TopLine>60</TopLine>
<CurrentLine>66</CurrentLine>
<Constant>0</Constant>
<WindowPosition>
<length>0</length>
<flags>0</flags>
<showCmd>0</showCmd>
<MinPosition>
<xPos>0</xPos>
<yPos>0</yPos>
</MinPosition>
<MaxPosition>
<xPos>0</xPos>
<yPos>0</yPos>
</MaxPosition>
<NormalPosition>
<Top>0</Top>
<Left>0</Left>
<Right>0</Right>
<Bottom>0</Bottom>
</NormalPosition>
</WindowPosition>
</AlienFiles>
<MDIGroups>
<Orientation>1</Orientation>
<ActiveMDIGroup>0</ActiveMDIGroup>
<MDIGroup>
<Size>100</Size>
<ActiveTab>0</ActiveTab>
<Documents>
<Doc>
<Name>.\rtconfig.h</Name>
<ColumnNumber>2</ColumnNumber>
<TopLine>60</TopLine>
<CurrentLine>66</CurrentLine>
</Doc>
</Documents>
</MDIGroup>
</MDIGroups>
</ProjectOpt> </ProjectOpt>

29
bsp/fm3/mb9bf500r/project.uvproj
View File

@ -49,7 +49,7 @@
<CreateLib>0</CreateLib> <CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile> <CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation> <DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation> <BrowseInformation>1</BrowseInformation>
<ListingPath>.\obj\</ListingPath> <ListingPath>.\obj\</ListingPath>
<HexFormatSelection>1</HexFormatSelection> <HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K> <Merge32K>0</Merge32K>
@ -160,10 +160,10 @@
<RunIndependent>0</RunIndependent> <RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability> <Capability>1</Capability>
<DriverSelection>4102</DriverSelection> <DriverSelection>4099</DriverSelection>
</Flash1> </Flash1>
<Flash2>Segger\JL2CM3.dll</Flash2> <Flash2>Segger\JL2CM3.dll</Flash2>
<Flash3></Flash3> <Flash3>"" ()</Flash3>
<Flash4></Flash4> <Flash4></Flash4>
</Utilities> </Utilities>
<TargetArmAds> <TargetArmAds>
@ -436,25 +436,15 @@
<Group> <Group>
<GroupName>FM3</GroupName> <GroupName>FM3</GroupName>
<Files> <Files>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\fm3\cpuport.c</FilePath>
</File>
<File> <File>
<FileName>context_rvds.S</FileName> <FileName>context_rvds.S</FileName>
<FileType>2</FileType> <FileType>2</FileType>
<FilePath>..\..\..\libcpu\arm\fm3\context_rvds.S</FilePath> <FilePath>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
</File> </File>
<File> <File>
<FileName>fault_rvds.S</FileName> <FileName>cpuport.c</FileName>
<FileType>2</FileType> <FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\fm3\fault_rvds.S</FilePath> <FilePath>..\..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
</File>
<File>
<FileName>start_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\libcpu\arm\fm3\start_rvds.S</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
@ -471,6 +461,11 @@
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\CMSIS\system_mb9bf50x.c</FilePath> <FilePath>..\CMSIS\system_mb9bf50x.c</FilePath>
</File> </File>
<File>
<FileName>start_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\CMSIS\start_rvds.S</FilePath>
</File>
</Files> </Files>
</Group> </Group>
<Group> <Group>

4
bsp/fm3/mb9bf500r/rtconfig.py
View File

@ -1,6 +1,6 @@
# toolchains options # toolchains options
ARCH='arm' ARCH='arm'
CPU='fm3' CPU='cortex-m3'
CROSS_TOOL='iar' CROSS_TOOL='iar'
# cross_tool provides the cross compiler # cross_tool provides the cross compiler
@ -57,7 +57,7 @@ elif PLATFORM == 'armcc':
DEVICE = ' --device DARMSTM' DEVICE = ' --device DARMSTM'
CFLAGS = DEVICE + ' --apcs=interwork' CFLAGS = DEVICE + ' --apcs=interwork'
AFLAGS = DEVICE AFLAGS = DEVICE
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter stm32_rom.sct' LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-fm3.map --scatter fm3_rom.sct'
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC' CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB' LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'

1505
bsp/fm3/mb9bf506r/fm3_easy_kit.dep
View File

File diff suppressed because it is too large Load Diff

13
bsp/fm3/mb9bf506r/fm3_easy_kit.ewp
View File

@ -1744,6 +1744,9 @@
<file> <file>
<name>$PROJ_DIR$\..\CMSIS\core_cm3.c</name> <name>$PROJ_DIR$\..\CMSIS\core_cm3.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\..\CMSIS\start_iar.S</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\CMSIS\system_mb9bf50x.c</name> <name>$PROJ_DIR$\..\CMSIS\system_mb9bf50x.c</name>
</file> </file>
@ -1814,16 +1817,10 @@
<group> <group>
<name>FM3</name> <name>FM3</name>
<file> <file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\context_iar.S</name> <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\context_iar.S</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\cpuport.c</name> <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\cpuport.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\fault_iar.S</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\libcpu\arm\fm3\start_iar.S</name>
</file> </file>
</group> </group>
<group> <group>

2
bsp/fm3/mb9bf506r/rtconfig.py
View File

@ -1,6 +1,6 @@
# toolchains options # toolchains options
ARCH='arm' ARCH='arm'
CPU='fm3' CPU='cortex-m3'
CROSS_TOOL='gcc' CROSS_TOOL='gcc'
# cross_tool provides the cross compiler # cross_tool provides the cross compiler

166
libcpu/arm/fm3/context_gcc.S
View File

@ -1,166 +0,0 @@
/*
* File : context_gcc.S
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-10-11 Bernard first version
*/
/**
* @addtogroup FM3
*/
/*@{*/
.cpu cortex-m3
.fpu softvfp
.syntax unified
.thumb
.text
.equ NVIC_INT_CTRL, 0xE000ED04 /* interrupt control state register */
.equ NVIC_SYSPRI2, 0xE000ED20 /* system priority register (2) */
.equ NVIC_PENDSV_PRI, 0x00FF0000 /* PendSV priority value (lowest) */
.equ NVIC_PENDSVSET, 0x10000000 /* value to trigger PendSV exception */
/*
* rt_base_t rt_hw_interrupt_disable();
*/
.global rt_hw_interrupt_disable
.type rt_hw_interrupt_disable, %function
rt_hw_interrupt_disable:
MRS r0, PRIMASK
CPSID I
BX LR
/*
* void rt_hw_interrupt_enable(rt_base_t level);
*/
.global rt_hw_interrupt_enable
.type rt_hw_interrupt_enable, %function
rt_hw_interrupt_enable:
MSR PRIMASK, r0
BX LR
/*
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
* r0 --> from
* r1 --> to
*/
.global rt_hw_context_switch_interrupt
.type rt_hw_context_switch_interrupt, %function
.global rt_hw_context_switch
.type rt_hw_context_switch, %function
rt_hw_context_switch_interrupt:
rt_hw_context_switch:
/* set rt_thread_switch_interrupt_flag to 1 */
LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */
STR r0, [r2]
_reswitch:
LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
BX LR
/* r0 --> swith from thread stack
* r1 --> swith to thread stack
* psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
*/
.global rt_hw_pend_sv
.type rt_hw_pend_sv, %function
rt_hw_pend_sv:
/* disable interrupt to protect context switch */
MRS r2, PRIMASK
CPSID I
/* get rt_thread_switch_interrupt_flag */
LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0]
CBZ r1, pendsv_exit /* pendsv already handled */
/* clear rt_thread_switch_interrupt_flag to 0 */
MOV r1, #0x00
STR r1, [r0]
LDR r0, =rt_interrupt_from_thread
LDR r1, [r0]
CBZ r1, swtich_to_thread /* skip register save at the first time */
MRS r1, psp /* get from thread stack pointer */
STMFD r1!, {r4 - r11} /* push r4 - r11 register */
LDR r0, [r0]
STR r1, [r0] /* update from thread stack pointer */
swtich_to_thread:
LDR r1, =rt_interrupt_to_thread
LDR r1, [r1]
LDR r1, [r1] /* load thread stack pointer */
LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
MSR psp, r1 /* update stack pointer */
pendsv_exit:
/* restore interrupt */
MSR PRIMASK, r2
ORR lr, lr, #0x04
BX lr
/*
* void rt_hw_context_switch_to(rt_uint32 to);
* r0 --> to
*/
.global rt_hw_context_switch_to
.type rt_hw_context_switch_to, %function
rt_hw_context_switch_to:
LDR r1, =rt_interrupt_to_thread
STR r0, [r1]
/* set from thread to 0 */
LDR r1, =rt_interrupt_from_thread
MOV r0, #0x0
STR r0, [r1]
/* set interrupt flag to 1 */
LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1
STR r0, [r1]
/* set the PendSV exception priority */
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
LDR.W r2, [r0,#0x00] /* read */
ORR r1,r1,r2 /* modify */
STR r1, [r0] /* write-back */
LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
CPSIE I /* enable interrupts at processor level */
/* never reach here! */
/* compatible with old version */
.global rt_hw_interrupt_thread_switch
.type rt_hw_interrupt_thread_switch, %function
rt_hw_interrupt_thread_switch:
BX lr
NOP

163
libcpu/arm/fm3/context_iar.S
View File

@ -1,163 +0,0 @@
;/*
; * File : context_iar.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
; *
; * The license and distribution terms for this file may be
; * found in the file LICENSE in this distribution or at
; * http://www.rt-thread.org/license/LICENSE
; *
; * Change Logs:
; * Date Author Notes
; * 2009-01-17 Bernard first version
; * 2009-09-27 Bernard add protect when contex switch occurs
; */
;/**
; * @addtogroup FM3
; */
;/*@{*/
NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
SECTION .text:CODE(2)
THUMB
REQUIRE8
PRESERVE8
IMPORT rt_thread_switch_interrupt_flag
IMPORT rt_interrupt_from_thread
IMPORT rt_interrupt_to_thread
;/*
; * rt_base_t rt_hw_interrupt_disable();
; */
EXPORT rt_hw_interrupt_disable
rt_hw_interrupt_disable:
MRS r0, PRIMASK
CPSID I
BX LR
;/*
; * void rt_hw_interrupt_enable(rt_base_t level);
; */
EXPORT rt_hw_interrupt_enable
rt_hw_interrupt_enable:
MSR PRIMASK, r0
BX LR
;/*
; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; * r0 --> from
; * r1 --> to
; */
EXPORT rt_hw_context_switch_interrupt
EXPORT rt_hw_context_switch
rt_hw_context_switch_interrupt:
rt_hw_context_switch:
; set rt_thread_switch_interrupt_flag to 1
LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
STR r0, [r2]
_reswitch
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
BX LR
; r0 --> swith from thread stack
; r1 --> swith to thread stack
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
EXPORT rt_hw_pend_sv
rt_hw_pend_sv:
; disable interrupt to protect context switch
MRS r2, PRIMASK
CPSID I
; get rt_thread_switch_interrupt_flag
LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0]
CBZ r1, pendsv_exit ; pendsv already handled
; clear rt_thread_switch_interrupt_flag to 0
MOV r1, #0x00
STR r1, [r0]
LDR r0, =rt_interrupt_from_thread
LDR r1, [r0]
CBZ r1, swtich_to_thread ; skip register save at the first time
MRS r1, psp ; get from thread stack pointer
STMFD r1!, {r4 - r11} ; push r4 - r11 register
LDR r0, [r0]
STR r1, [r0] ; update from thread stack pointer
swtich_to_thread
LDR r1, =rt_interrupt_to_thread
LDR r1, [r1]
LDR r1, [r1] ; load thread stack pointer
LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04
BX lr
;/*
; * void rt_hw_context_switch_to(rt_uint32 to);
; * r0 --> to
; */
EXPORT rt_hw_context_switch_to
rt_hw_context_switch_to:
LDR r1, =rt_interrupt_to_thread
STR r0, [r1]
; set from thread to 0
LDR r1, =rt_interrupt_from_thread
MOV r0, #0x0
STR r0, [r1]
; set interrupt flag to 1
LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1
STR r0, [r1]
; set the PendSV exception priority
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
LDR.W r2, [r0,#0x00] ; read
ORR r1,r1,r2 ; modify
STR r1, [r0] ; write-back
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
CPSIE I ; enable interrupts at processor level
; never reach here!
; compatible with old version
EXPORT rt_hw_interrupt_thread_switch
rt_hw_interrupt_thread_switch:
BX lr
END

162
libcpu/arm/fm3/context_rvds.S
View File

@ -1,162 +0,0 @@
;/*
; * File : context_rvds.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
; *
; * The license and distribution terms for this file may be
; * found in the file LICENSE in this distribution or at
; * http://www.rt-thread.org/license/LICENSE
; *
; * Change Logs:
; * Date Author Notes
; * 2011-02-23 Bernard first version
; */
NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
AREA |.text|, CODE, READONLY, ALIGN=2
THUMB
REQUIRE8
PRESERVE8
IMPORT rt_thread_switch_interrupt_flag
IMPORT rt_interrupt_from_thread
IMPORT rt_interrupt_to_thread
;/*
; * rt_base_t rt_hw_interrupt_disable();
; */
rt_hw_interrupt_disable PROC
EXPORT rt_hw_interrupt_disable
MRS r0, PRIMASK
CPSID I
BX LR
ENDP
;/*
; * void rt_hw_interrupt_enable(rt_base_t level);
; */
rt_hw_interrupt_enable PROC
EXPORT rt_hw_interrupt_enable
MSR PRIMASK, r0
BX LR
ENDP
;/*
; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; * r0 --> from
; * r1 --> to
; */
rt_hw_context_switch_interrupt
EXPORT rt_hw_context_switch_interrupt
rt_hw_context_switch PROC
EXPORT rt_hw_context_switch
; set rt_thread_switch_interrupt_flag to 1
LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
STR r0, [r2]
_reswitch
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
BX LR
ENDP
; r0 --> swith from thread stack
; r1 --> swith to thread stack
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
rt_hw_pend_sv PROC
EXPORT rt_hw_pend_sv
; disable interrupt to protect context switch
MRS r2, PRIMASK
CPSID I
; get rt_thread_switch_interrupt_flag
LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0]
CBZ r1, pendsv_exit ; pendsv already handled
; clear rt_thread_switch_interrupt_flag to 0
MOV r1, #0x00
STR r1, [r0]
LDR r0, =rt_interrupt_from_thread
LDR r1, [r0]
CBZ r1, swtich_to_thread ; skip register save at the first time
MRS r1, psp ; get from thread stack pointer
STMFD r1!, {r4 - r11} ; push r4 - r11 register
LDR r0, [r0]
STR r1, [r0] ; update from thread stack pointer
swtich_to_thread
LDR r1, =rt_interrupt_to_thread
LDR r1, [r1]
LDR r1, [r1] ; load thread stack pointer
LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04
BX lr
ENDP
;/*
; * void rt_hw_context_switch_to(rt_uint32 to);
; * r0 --> to
; * this fucntion is used to perform the first thread switch
; */
rt_hw_context_switch_to PROC
EXPORT rt_hw_context_switch_to
; set to thread
LDR r1, =rt_interrupt_to_thread
STR r0, [r1]
; set from thread to 0
LDR r1, =rt_interrupt_from_thread
MOV r0, #0x0
STR r0, [r1]
; set interrupt flag to 1
LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1
STR r0, [r1]
; set the PendSV exception priority
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
LDR.W r2, [r0,#0x00] ; read
ORR r1,r1,r2 ; modify
STR r1, [r0] ; write-back
; trigger the PendSV exception (causes context switch)
LDR r0, =NVIC_INT_CTRL
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
; enable interrupts at processor level
CPSIE I
; never reach here!
ENDP
END

122
libcpu/arm/fm3/cpuport.c
View File

@ -1,122 +0,0 @@
/*
* File : cpuport.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2011-02-23 Bernard the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include "mb9bf506r.h"
#include "core_cm3.h"
/* switch flag on interrupt and thread pointer to save switch record */
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;
/* stack context in ARM Cortex-M3 */
struct stack_context
{
rt_uint32_t r0;
rt_uint32_t r1;
rt_uint32_t r2;
rt_uint32_t r3;
rt_uint32_t r12;
rt_uint32_t lr;
rt_uint32_t pc;
rt_uint32_t psr;
};
extern void rt_hw_interrupt_thread_switch(void);
extern void list_thread(void);
extern rt_thread_t rt_current_thread;
void rt_hw_hard_fault_exception(struct stack_context* contex)
{
rt_kprintf("psr: 0x%08x\n", contex->psr);
rt_kprintf(" pc: 0x%08x\n", contex->pc);
rt_kprintf(" lr: 0x%08x\n", contex->lr);
rt_kprintf("r12: 0x%08x\n", contex->r12);
rt_kprintf("r03: 0x%08x\n", contex->r3);
rt_kprintf("r02: 0x%08x\n", contex->r2);
rt_kprintf("r01: 0x%08x\n", contex->r1);
rt_kprintf("r00: 0x%08x\n", contex->r0);
if (rt_current_thread != RT_NULL)
{
rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
#ifdef RT_USING_FINSH
list_thread();
#endif
while (1);
}
else
{
rt_kprintf("hard fault on initialization\n");
}
}
/**
* reset MCU
*
*/
void rt_hw_cpu_reset()
{
NVIC_SystemReset();
}
/**
* shutdown CPU
*
*/
void rt_hw_cpu_shutdown()
{
rt_kprintf("shutdown...\n");
RT_ASSERT(0);
}
/**
* This function will initialize thread stack
*
* @param tentry the entry of thread
* @param parameter the parameter of entry
* @param stack_addr the beginning stack address
* @param texit the function will be called when thread exit
*
* @return stack address
*/
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
rt_uint8_t *stack_addr, void *texit)
{
unsigned long *stk;
stk = (unsigned long *)stack_addr;
*(stk) = 0x01000000L; /* PSR */
*(--stk) = (unsigned long)tentry; /* entry point, pc */
*(--stk) = (unsigned long)texit; /* lr */
*(--stk) = 0; /* r12 */
*(--stk) = 0; /* r3 */
*(--stk) = 0; /* r2 */
*(--stk) = 0; /* r1 */
*(--stk) = (unsigned long)parameter; /* r0 : argument */
*(--stk) = 0; /* r11 */
*(--stk) = 0; /* r10 */
*(--stk) = 0; /* r9 */
*(--stk) = 0; /* r8 */
*(--stk) = 0; /* r7 */
*(--stk) = 0; /* r6 */
*(--stk) = 0; /* r5 */
*(--stk) = 0; /* r4 */
/* return task's current stack address */
return (rt_uint8_t *)stk;
}

31
libcpu/arm/fm3/fault_gcc.S
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@ -1,31 +0,0 @@
/*
* File : fault_gcc.S
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-10-11 Bernard first version
*/
.cpu cortex-m3
.fpu softvfp
.syntax unified
.thumb
.text
.global rt_hw_hard_fault
.type rt_hw_hard_fault, %function
rt_hw_hard_fault:
/* get current context */
MRS r0, psp /* get fault thread stack pointer */
PUSH {lr}
BL rt_hw_hard_fault_exception
POP {lr}
ORR lr, lr, #0x04
BX lr

34
libcpu/arm/fm3/fault_iar.S
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@ -1,34 +0,0 @@
;/*
; * File : fault_iar.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
; *
; * The license and distribution terms for this file may be
; * found in the file LICENSE in this distribution or at
; * http://www.rt-thread.org/license/LICENSE
; *
; * Change Logs:
; * Date Author Notes
; * 2009-01-17 Bernard first version
; */
SECTION .text:CODE(2)
THUMB
REQUIRE8
PRESERVE8
IMPORT rt_hw_hard_fault_exception
EXPORT rt_hw_hard_fault
rt_hw_hard_fault:
; get current context
MRS r0, psp ; get fault thread stack pointer
PUSH {lr}
BL rt_hw_hard_fault_exception
POP {lr}
ORR lr, lr, #0x04
BX lr
END

35
libcpu/arm/fm3/fault_rvds.S
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@ -1,35 +0,0 @@
;/*
; * File : fault_rvds.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
; *
; * The license and distribution terms for this file may be
; * found in the file LICENSE in this distribution or at
; * http://www.rt-thread.org/license/LICENSE
; *
; * Change Logs:
; * Date Author Notes
; * 2011-02-23 Bernard first version
; */
AREA |.text|, CODE, READONLY, ALIGN=2
THUMB
REQUIRE8
PRESERVE8
IMPORT rt_hw_hard_fault_exception
rt_hw_hard_fault PROC
EXPORT rt_hw_hard_fault
; get current context
MRS r0, psp ; get fault thread stack pointer
PUSH {lr}
BL rt_hw_hard_fault_exception
POP {lr}
ORR lr, lr, #0x04
BX lr
ENDP
END