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update jz47xx branch code. 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@892 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
bernard.xiong@gmail.com 2010-09-05 05:16:10 +00:00
parent 144af8fcfe
commit b63899a92a
7 changed files with 124 additions and 49 deletions
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1
bsp/jz47xx/board.c
View File

@ -46,6 +46,7 @@ void rt_hw_board_init()
/* init hardware UART device */
rt_hw_uart_init();
#endif
#ifdef RT_USING_CONSOLE
/* set console device */
rt_console_set_device("uart");

1
bsp/jz47xx/board.h
View File

@ -17,6 +17,7 @@
void rt_hw_board_init(void);
/* 32M SDRAM */
#define RT_HW_HEAP_END (0x80000000 + 32 * 1024 * 1024)
#endif

64
bsp/jz47xx/jz47xx_ram.lds
View File

@ -11,20 +11,33 @@
* Date Author Notes
* 2010-05-17 swkyer first version
* 2010-08-23 bernard change to jz47xx
* 2010-09-04 bernard move the beginning entry to 0x80100000
*/
OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
OUTPUT_ARCH(mips)
ENTRY(_entry)
SECTIONS
MEMORY
{
.start 0x80000000:
{
*(.start);
/* 16M SDRAM */
DRAM : ORIGIN = 0x80100000, LENGTH = 0x01000000
/* 16K SRAM */
IRAM : ORIGIN = 0x80000000, LENGTH = 0x00004000
}
.text ALIGN(0x4) :
ENTRY(_start)
SECTIONS
{
. = 0x80100000 ;
.start :
{
*(.start);
} > DRAM
. = ALIGN(4);
.text :
{
*(.text)
*(.text.*)
@ -43,9 +56,11 @@ SECTIONS
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
}
} > DRAM
.data ALIGN(0x4) :
. = ALIGN(4);
.data :
{
*(.data)
*(.data.*)
@ -58,16 +73,39 @@ SECTIONS
*(.sdata)
*(.sdata.*)
}
} > DRAM
. = ALIGN(4);
_iramat = .;
.iram : AT(_iramat)
{
_iramstart = .;
*(.vectors.1);
. = 0x100;
*(.vectors.2);
. = 0x180;
*(.vectors.3);
. = 0x200;
*(.vectors.4);
*(.vectors);
*(.icode);
*(.irodata);
*(.idata);
KEEP(*(.vectors*))
_iramend = .;
} > IRAM
_iramcopy = LOADADDR(.iram);
__bss_start = ABSOLUTE(.);
.sbss :
{
__bss_start = .;
*(.sbss)
*(.sbss.*)
*(.dynsbss)
*(.scommon)
}
} > DRAM
.bss :
{
@ -75,8 +113,8 @@ SECTIONS
*(.bss.*)
*(.dynbss)
*(COMMON)
}
__bss_end = ABSOLUTE(.);
__bss_end = .;
} > DRAM
_end = .;

9
bsp/jz47xx/rtconfig.h
View File

@ -3,13 +3,13 @@
#define __RTTHREAD_CFG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
#define RT_NAME_MAX 10
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX */
#define RT_THREAD_PRIORITY_MAX 32
#define RT_THREAD_PRIORITY_MAX 256
/* Tick per Second */
#define RT_TICK_PER_SECOND 100
@ -57,12 +57,13 @@
/* SECTION: Device System */
/* Using Device System */
#define RT_USING_DEVICE
/* RT_USING_UART */
#define RT_USING_UART0
#define RT_USING_UART
#define RT_USING_UART1
#define RT_UART_RX_BUFFER_SIZE 64
/* SECTION: Console options */
/* the buffer size of console */
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
/* SECTION: finsh, a C-Express shell */

4
bsp/jz47xx/rtconfig.py
View File

@ -82,4 +82,6 @@ else:
CFLAGS += ' -O2'
RT_USING_MINILIBC = True
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
COPY_ACTION = 'copy rtthread.bin usbboot\n'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + DUMP_ACTION + COPY_ACTION

16
bsp/jz47xx/startup.c
View File

@ -27,15 +27,31 @@ extern unsigned char __bss_end;
extern int rt_application_init(void);
void dump_memory(rt_uint8_t* ptr, rt_size_t size)
{
rt_size_t index;
for (index = 0; index < size; index ++)
{
rt_kprintf("%02x ", ptr[index] & 0xff);
if ((index + 1) % 16 == 0) rt_kprintf("\n");
}
}
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* init hardware interrupt */
rt_hw_interrupt_init();
/* init board */
rt_hw_board_init();
rt_show_version();
dump_memory((rt_uint8_t*)0x80000200, 32);
/* init tick */
rt_system_tick_init();

24
bsp/jz47xx/uart.c
View File

@ -1,5 +1,6 @@
#include <rthw.h>
#include <rtthread.h>
#include <jz47xx.h>
/**
* @addtogroup Jz47xx
@ -11,7 +12,6 @@
#define UART_BAUDRATE 115200
#define DEV_CLK 12000000
/*
* Define macros for UARTIER
* UART Interrupt Enable Register
@ -209,8 +209,11 @@ static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
{
/* Enable the UART Interrupt */
UART_IER(uart->hw_base) |= (UARTIER_RIE | UARTIER_RTIE);
}
/* install interrupt */
rt_hw_interrupt_install(uart->irq, rt_uart_irqhandler, RT_NULL);
rt_hw_interrupt_umask(uart->irq);
}
return RT_EOK;
}
@ -293,13 +296,13 @@ static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer
if (*ptr == '\n')
{
/* FIFO status, contain valid data */
while ( !(UART_LSR(uart->hw_base) & (UARTLSR_TDRQ | UARTLSR_TEMT) == 0x60) );
while (!((UART_LSR(uart->hw_base) & (UARTLSR_TDRQ | UARTLSR_TEMT)) == 0x60));
/* write data */
UART_TDR(uart->hw_base) = '\r';
}
/* FIFO status, contain valid data */
while ( !(UART_LSR(uart->hw_base) & (UARTLSR_TDRQ | UARTLSR_TEMT) == 0x60) );
while (!((UART_LSR(uart->hw_base) & (UARTLSR_TDRQ | UARTLSR_TEMT)) == 0x60));
/* write data */
UART_TDR(uart->hw_base) = *ptr;
@ -336,6 +339,19 @@ void rt_hw_uart_init(void)
uart->parent.type = RT_Device_Class_Char;
rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
uart->read_index = uart->save_index = 0;
#if defined(RT_USING_UART0)
uart->hw_base = UART0_BASE;
uart->irq = IRQ_UART0;
#elif defined(RT_USING_UART1)
uart->hw_base = UART1_BASE;
uart->irq = IRQ_UART1;
#elif defined(RT_USING_UART2)
uart->hw_base = UART2_BASE;
uart->irq = IRQ_UART2;
#elif defined(RT_USING_UART3)
uart->hw_base = UART3_BASE;
uart->irq = IRQ_UART3;
#endif
/* device interface */
uart->parent.init = rt_uart_init;