Merge pull request #431 from ArdaFu/master
[BSP] TM4C129X Fix bugs and errors.
This commit is contained in:
Bernard Xiong
commit
a2fbc5f5a8
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@ -13,23 +13,13 @@
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*/
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#include <rtthread.h>
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#include <board.h>
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#include <components.h>
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#ifdef RT_USING_LWIP
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#include "drv_eth.h"
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#endif
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/* thread phase init */
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void rt_init_thread_entry(void *parameter)
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{
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/* Initialization RT-Thread Components */
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rt_components_init();
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#ifdef RT_USING_FINSH
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finsh_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#ifdef RT_USING_LWIP
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rt_hw_tiva_eth_init();
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#endif
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}
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int rt_application_init(void)
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@ -42,3 +32,4 @@ int rt_application_init(void)
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return 0;
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}
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@ -15,9 +15,9 @@
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#include <rthw.h>
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#include <rtthread.h>
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#include <components.h>
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#include "board.h"
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#include "drv_uart.h"
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#include "driverlib/interrupt.h"
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#include "driverlib/sysctl.h"
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@ -60,24 +60,28 @@ extern void HardFault_Handler(void);
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* This function will initial LPC40xx board.
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*/
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void rt_hw_board_init()
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{
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//init low level drivers. e.g. cpu uart etc.
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rt_components_board_init();
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//redirect RTT stdio to CONSOLE device
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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}
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int rt_hw_cpu_init(void)
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{
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MAP_IntMasterDisable();
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IntRegister(FAULT_HARD, HardFault_Handler);
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IntRegister(FAULT_PENDSV, PendSV_Handler);
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IntRegister(FAULT_SYSTICK, SysTick_Handler);
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//
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// Enable lazy stacking for interrupt handlers. This allows floating-point
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// instructions to be used within interrupt handlers, but at the expense of
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// extra stack usage.
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//
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MAP_FPULazyStackingEnable();
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//
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// Set the clocking to run directly from the external crystal/oscillator.
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// TODO: The SYSCTL_XTAL_ value must be changed to match the value of the
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// crystal on your board.
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//
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SysClock = MAP_SysCtlClockFreqSet(
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(SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_480),
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SYS_CLOCK_DEFAULT);
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@ -87,15 +91,8 @@ void rt_hw_board_init()
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MAP_SysTickIntEnable();
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MAP_SysTickEnable();
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/* set pend exception priority */
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//IntPrioritySet(FAULT_PENDSV, (1 << 5) - 1);
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/*init uart device*/
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rt_hw_uart_init();
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//redirect RTT stdio to CONSOLE device
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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//
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// Enable interrupts to the processor.
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//
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MAP_IntMasterEnable();
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return 0;
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}
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// rt_hw_cpu_init should be run before any other INIT_BOARD_EXPORT
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// We use INIT_EXPORT here and set the sequence index to "0.xxxx"
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INIT_EXPORT(rt_hw_cpu_init, "0.post");
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@ -17,7 +17,7 @@
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include "tm4c129xnczad.h"
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#include "tm4c1294ncpdt.h"
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#include <rtthread.h>
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#include <stdbool.h>
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#include <stdint.h>
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@ -146,6 +146,8 @@ extern void lwIPHostGetTime(u32_t *time_s, u32_t *time_ns);
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#include "lwipopts.h"
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#include "drv_eth.h"
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#include <components.h>
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/**
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* A structure used to keep track of driver state and error counts.
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*/
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@ -1378,7 +1380,7 @@ static struct pbuf* eth_dev_rx(rt_device_t dev)
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return (result == RT_EOK)? (struct pbuf*)temp : RT_NULL;
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}
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rt_err_t rt_hw_tiva_eth_init(void)
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int rt_hw_tiva_eth_init(void)
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{
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rt_err_t result;
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@ -1406,6 +1408,11 @@ rt_err_t rt_hw_tiva_eth_init(void)
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result = eth_device_init(&(eth_dev->parent), "e0");
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return result;
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}
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// eth_device_init using malloc
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// We use INIT_COMPONENT_EXPORT insted of INIT_BOARD_EXPORT
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INIT_COMPONENT_EXPORT(rt_hw_tiva_eth_init);
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#if 0
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#ifdef RT_USING_FINSH
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#include "finsh.h"
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@ -15,6 +15,6 @@
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#ifndef __TIVA_ETH_H__
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#define __TIVA_ETH_H__
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rt_err_t rt_hw_tiva_eth_init(void);
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int rt_hw_tiva_eth_init(void);
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#endif
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@ -18,7 +18,7 @@
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#include <rtdevice.h>
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#include "board.h"
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//#include <components.h>
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#include <components.h>
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#include "inc/hw_memmap.h"
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#include "driverlib/sysctl.h"
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@ -220,4 +220,4 @@ int rt_hw_uart_init(void)
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#endif
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return 0;
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}
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//INIT_BOARD_EXPORT(rt_hw_uart_init);
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INIT_BOARD_EXPORT(rt_hw_uart_init);
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@ -14,8 +14,6 @@ elif rtconfig.CROSS_TOOL == 'keil':
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src += ['startup/startup_rvmdk.S']
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elif rtconfig.CROSS_TOOL == 'iar':
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src += ['startup/startup_ewarm.c']
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elif rtconfig.CROSS_TOOL == 'ccs':
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src += ['startup/startup_ccs.c']
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CPPPATH = [cwd, cwd + '/inc', cwd + '/driverlib']
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File diff suppressed because it is too large
Load Diff
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@ -180,19 +180,19 @@
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// <bool name="RT_LWIP_DNS" description="Enable DNS protocol" default="true" />
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#define RT_LWIP_DNS
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// <integer name="RT_LWIP_PBUF_NUM" description="Maximal number of buffers in the pbuf pool" default="4" />
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#define RT_LWIP_PBUF_NUM 4
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#define RT_LWIP_PBUF_NUM 8
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// <integer name="RT_LWIP_TCP_PCB_NUM" description="Maximal number of simultaneously active TCP connections" default="5" />
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#define RT_LWIP_TCP_PCB_NUM 3
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#define RT_LWIP_TCP_PCB_NUM 5
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// <integer name="RT_LWIP_TCP_SND_BUF" description="TCP sender buffer size" default="8192" />
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#define RT_LWIP_TCP_SND_BUF 4086
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#define RT_LWIP_TCP_SND_BUF 8192
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// <integer name="RT_LWIP_TCP_WND" description="TCP receive window" default="8192" />
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#define RT_LWIP_TCP_WND 2048
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#define RT_LWIP_TCP_WND 8192
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// <bool name="RT_LWIP_SNMP" description="Enable SNMP protocol" default="false" />
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// #define RT_LWIP_SNMP
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// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
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// #define RT_LWIP_DHCP
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#define RT_LWIP_DHCP
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// <integer name="RT_LWIP_TCP_SEG_NUM" description="the number of simultaneously queued TCP" default="4" />
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#define RT_LWIP_TCP_SEG_NUM 12
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#define RT_LWIP_TCP_SEG_NUM 24
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// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
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#define RT_LWIP_TCPTHREAD_PRIORITY 12
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// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />
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@ -29,8 +29,8 @@ elif CROSS_TOOL == 'iar':
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if os.getenv('RTT_EXEC_PATH'):
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EXEC_PATH = os.getenv('RTT_EXEC_PATH')
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BUILD = 'debug'
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#BUILD = 'release'
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#BUILD = 'debug'
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BUILD = 'release'
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if PLATFORM == 'gcc':
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# tool-chains
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@ -12,26 +12,26 @@
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<ToolsetName>ARM-ADS</ToolsetName>
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<TargetOption>
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<TargetCommonOption>
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<Device>TM4C129XNCZAD</Device>
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<Device>TM4C1294NCPDT</Device>
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<Vendor>Texas Instruments</Vendor>
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<PackID>Keil.TM4C_DFP.1.0.0</PackID>
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<PackURL>http://www.keil.com/pack/</PackURL>
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<Cpu>IROM(0x00000000,0x100000) IRAM(0x20000000,0x040000) CPUTYPE("Cortex-M4") FPU2 CLOCK(120000000) ELITTLE</Cpu>
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<FlashUtilSpec></FlashUtilSpec>
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<StartupFile></StartupFile>
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<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0TM4C129_1024 -FS00 -FL0100000 -FP0($$Device:TM4C129XNCZAD$Flash\TM4C129_1024.FLM))</FlashDriverDll>
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<DeviceId>7096</DeviceId>
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<RegisterFile>$$Device:TM4C129XNCZAD$Device\Include\TM4C129\TM4C129.h</RegisterFile>
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<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0TM4C129_1024 -FS00 -FL0100000 -FP0($$Device:TM4C1294NCPDT$Flash\TM4C129_1024.FLM))</FlashDriverDll>
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<DeviceId>7088</DeviceId>
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<RegisterFile>$$Device:TM4C1294NCPDT$Device\Include\TM4C129\TM4C129.h</RegisterFile>
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<MemoryEnv></MemoryEnv>
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<Cmp></Cmp>
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<Asm></Asm>
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<Linker></Linker>
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<OHString></OHString>
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<InfinionOptionDll></InfinionOptionDll>
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<SLE66CMisc>-DTM4C129XNCZAD</SLE66CMisc>
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<SLE66CMisc>-DTM4C1294NCPDT</SLE66CMisc>
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<SLE66AMisc></SLE66AMisc>
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<SLE66LinkerMisc></SLE66LinkerMisc>
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<SFDFile>$$Device:TM4C129XNCZAD$SVD\TM4C129\TM4C129XNCZAD.svd</SFDFile>
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<SFDFile>$$Device:TM4C1294NCPDT$SVD\TM4C129\TM4C1294NCPDT.svd</SFDFile>
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<bCustSvd>0</bCustSvd>
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<UseEnv>0</UseEnv>
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<BinPath></BinPath>
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@ -52,7 +52,7 @@
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<CreateLib>0</CreateLib>
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<CreateHexFile>0</CreateHexFile>
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<DebugInformation>1</DebugInformation>
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<BrowseInformation>0</BrowseInformation>
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<BrowseInformation>1</BrowseInformation>
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<ListingPath>.\</ListingPath>
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<HexFormatSelection>1</HexFormatSelection>
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<Merge32K>0</Merge32K>
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@ -148,7 +148,7 @@
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<UsePdscDebugDescription>1</UsePdscDebugDescription>
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</Target>
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<RunDebugAfterBuild>0</RunDebugAfterBuild>
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<TargetSelection>3</TargetSelection>
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<TargetSelection>6</TargetSelection>
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<SimDlls>
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<CpuDll></CpuDll>
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<CpuDllArguments></CpuDllArguments>
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@ -162,7 +162,7 @@
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<PeripheralDll></PeripheralDll>
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<PeripheralDllArguments></PeripheralDllArguments>
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<InitializationFile></InitializationFile>
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<Driver>BIN\lmidk-agdi.dll</Driver>
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<Driver>Segger\JL2CM3.dll</Driver>
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</TargetDlls>
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</DebugOption>
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<Utilities>
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@ -78,3 +78,4 @@ place at start of SRAM { section VTABLE };
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place in SRAM { readwrite, block HEAP };
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keep { section FSymTab };
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keep { section VSymTab };
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keep { section .rti_fn* };
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