Merge pull request #1278 from liu2guang/master
[BSP] add rt1050 pin driver code. | 添加rt1050 PIN驱动代码.
This commit is contained in:
commit
9ae79c0c15
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@ -127,7 +127,7 @@ CONFIG_RT_USING_SERIAL=y
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# CONFIG_RT_USING_CPUTIME is not set
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CONFIG_RT_USING_I2C=y
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CONFIG_RT_USING_I2C_BITOPS=y
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# CONFIG_RT_USING_PIN is not set
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CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_MTD_NOR is not set
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# CONFIG_RT_USING_MTD_NAND is not set
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# CONFIG_RT_USING_RTC is not set
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@ -15,6 +15,9 @@ drv_sdram.c
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CPPPATH = [cwd]
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CPPDEFINES = []
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if GetDepend('RT_USING_PIN'):
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src += ['drv_pin.c']
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if GetDepend('RT_USING_LWIP'):
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src += ['drv_eth.c', 'fsl_phy.c']
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CPPDEFINES += ['FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE']
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@ -0,0 +1,279 @@
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/*
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* File : drv_pin.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2018-03-13 Liuguang the first version.
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*/
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#include "drv_pin.h"
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#include "fsl_common.h"
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#include "fsl_iomuxc.h"
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#include "fsl_gpio.h"
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#ifdef RT_USING_PIN
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/* GPIO外设时钟会在GPIO_PinInit中自动配置, 如果定义了以下宏则不会自动配置 */
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#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
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#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
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#endif
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/* RT1052 PIN描述结构体 */
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struct rt1052_pin
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{
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rt_uint16_t pin;
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GPIO_Type *gpio;
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rt_uint32_t gpio_pin;
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};
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#define __ARRAY_LEN(array) (sizeof(array)/sizeof(array[0]))
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#define __RT1052_PIN_DEFAULT {0, 0, 0}
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#define __RT1052_PIN(INDEX, PORT, PIN) {INDEX, PORT, PIN}
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static struct rt1052_pin rt1052_pin_map[] =
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{
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__RT1052_PIN_DEFAULT,
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/* GPIO4 */
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__RT1052_PIN( 1, GPIO4, 0), /* GPIO_EMC_00 */
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__RT1052_PIN( 2, GPIO4, 1), /* GPIO_EMC_01 */
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__RT1052_PIN( 3, GPIO4, 2), /* GPIO_EMC_02 */
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__RT1052_PIN( 4, GPIO4, 3), /* GPIO_EMC_03 */
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__RT1052_PIN( 5, GPIO4, 4), /* GPIO_EMC_04 */
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__RT1052_PIN( 6, GPIO4, 5), /* GPIO_EMC_05 */
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__RT1052_PIN( 7, GPIO4, 6), /* GPIO_EMC_06 */
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__RT1052_PIN( 8, GPIO4, 7), /* GPIO_EMC_07 */
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__RT1052_PIN( 9, GPIO4, 8), /* GPIO_EMC_08 */
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__RT1052_PIN(10, GPIO4, 9), /* GPIO_EMC_09 */
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__RT1052_PIN(11, GPIO4, 10), /* GPIO_EMC_10 */
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__RT1052_PIN(12, GPIO4, 11), /* GPIO_EMC_11 */
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__RT1052_PIN(13, GPIO4, 12), /* GPIO_EMC_12 */
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__RT1052_PIN(14, GPIO4, 13), /* GPIO_EMC_13 */
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__RT1052_PIN(15, GPIO4, 14), /* GPIO_EMC_14 */
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__RT1052_PIN(16, GPIO4, 15), /* GPIO_EMC_15 */
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__RT1052_PIN(17, GPIO4, 16), /* GPIO_EMC_16 */
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__RT1052_PIN(18, GPIO4, 17), /* GPIO_EMC_17 */
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__RT1052_PIN(19, GPIO4, 18), /* GPIO_EMC_18 */
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__RT1052_PIN(20, GPIO4, 19), /* GPIO_EMC_19 */
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__RT1052_PIN(21, GPIO4, 20), /* GPIO_EMC_20 */
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__RT1052_PIN(22, GPIO4, 21), /* GPIO_EMC_21 */
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__RT1052_PIN(23, GPIO4, 22), /* GPIO_EMC_22 */
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__RT1052_PIN(24, GPIO4, 23), /* GPIO_EMC_23 */
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__RT1052_PIN(25, GPIO4, 24), /* GPIO_EMC_24 */
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__RT1052_PIN(26, GPIO4, 25), /* GPIO_EMC_25 */
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__RT1052_PIN(27, GPIO4, 26), /* GPIO_EMC_26 */
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__RT1052_PIN(28, GPIO4, 27), /* GPIO_EMC_27 */
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__RT1052_PIN(29, GPIO4, 28), /* GPIO_EMC_28 */
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__RT1052_PIN(30, GPIO4, 29), /* GPIO_EMC_29 */
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__RT1052_PIN(31, GPIO4, 30), /* GPIO_EMC_30 */
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__RT1052_PIN(32, GPIO4, 31), /* GPIO_EMC_31 */
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__RT1052_PIN(33, GPIO3, 18), /* GPIO_EMC_32 */
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__RT1052_PIN(34, GPIO3, 19), /* GPIO_EMC_33 */
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__RT1052_PIN(35, GPIO3, 20), /* GPIO_EMC_34 */
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__RT1052_PIN(36, GPIO3, 21), /* GPIO_EMC_35 */
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__RT1052_PIN(37, GPIO3, 22), /* GPIO_EMC_36 */
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__RT1052_PIN(38, GPIO3, 23), /* GPIO_EMC_37 */
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__RT1052_PIN(39, GPIO3, 24), /* GPIO_EMC_38 */
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__RT1052_PIN(40, GPIO3, 25), /* GPIO_EMC_39 */
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__RT1052_PIN(41, GPIO3, 26), /* GPIO_EMC_40 */
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__RT1052_PIN(42, GPIO3, 27), /* GPIO_EMC_41 */
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/* GPIO1 */
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__RT1052_PIN(43, GPIO1, 0), /* GPIO_AD_B0_00 */
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__RT1052_PIN(44, GPIO1, 1), /* GPIO_AD_B0_01 */
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__RT1052_PIN(45, GPIO1, 2), /* GPIO_AD_B0_02 */
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__RT1052_PIN(46, GPIO1, 3), /* GPIO_AD_B0_03 */
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__RT1052_PIN(47, GPIO1, 4), /* GPIO_AD_B0_04 */
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__RT1052_PIN(48, GPIO1, 5), /* GPIO_AD_B0_05 */
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__RT1052_PIN(49, GPIO1, 6), /* GPIO_AD_B0_06 */
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__RT1052_PIN(50, GPIO1, 7), /* GPIO_AD_B0_07 */
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__RT1052_PIN(51, GPIO1, 8), /* GPIO_AD_B0_08 */
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__RT1052_PIN(52, GPIO1, 9), /* GPIO_AD_B0_09 */
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__RT1052_PIN(53, GPIO1, 10), /* GPIO_AD_B0_10 */
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__RT1052_PIN(54, GPIO1, 11), /* GPIO_AD_B0_11 */
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__RT1052_PIN(55, GPIO1, 12), /* GPIO_AD_B0_12 */
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__RT1052_PIN(56, GPIO1, 13), /* GPIO_AD_B0_13 */
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__RT1052_PIN(57, GPIO1, 14), /* GPIO_AD_B0_14 */
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__RT1052_PIN(58, GPIO1, 15), /* GPIO_AD_B0_15 */
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__RT1052_PIN(59, GPIO1, 16), /* GPIO_AD_B1_00 */
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__RT1052_PIN(60, GPIO1, 17), /* GPIO_AD_B1_01 */
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__RT1052_PIN(61, GPIO1, 18), /* GPIO_AD_B1_02 */
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__RT1052_PIN(62, GPIO1, 19), /* GPIO_AD_B1_03 */
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__RT1052_PIN(63, GPIO1, 20), /* GPIO_AD_B1_04 */
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__RT1052_PIN(64, GPIO1, 21), /* GPIO_AD_B1_05 */
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__RT1052_PIN(65, GPIO1, 22), /* GPIO_AD_B1_06 */
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__RT1052_PIN(66, GPIO1, 23), /* GPIO_AD_B1_07 */
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__RT1052_PIN(67, GPIO1, 24), /* GPIO_AD_B1_08 */
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__RT1052_PIN(68, GPIO1, 25), /* GPIO_AD_B1_09 */
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__RT1052_PIN(69, GPIO1, 26), /* GPIO_AD_B1_10 */
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__RT1052_PIN(70, GPIO1, 27), /* GPIO_AD_B1_11 */
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__RT1052_PIN(71, GPIO1, 28), /* GPIO_AD_B1_12 */
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__RT1052_PIN(72, GPIO1, 29), /* GPIO_AD_B1_13 */
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__RT1052_PIN(73, GPIO1, 30), /* GPIO_AD_B1_14 */
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__RT1052_PIN(74, GPIO1, 31), /* GPIO_AD_B1_15 */
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/* GPIO2 */
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__RT1052_PIN( 75, GPIO2, 0), /* GPIO_B0_00 */
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__RT1052_PIN( 76, GPIO2, 1), /* GPIO_B0_01 */
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__RT1052_PIN( 77, GPIO2, 2), /* GPIO_B0_02 */
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__RT1052_PIN( 78, GPIO2, 3), /* GPIO_B0_03 */
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__RT1052_PIN( 79, GPIO2, 4), /* GPIO_B0_04 */
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__RT1052_PIN( 80, GPIO2, 5), /* GPIO_B0_05 */
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__RT1052_PIN( 81, GPIO2, 6), /* GPIO_B0_06 */
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__RT1052_PIN( 82, GPIO2, 7), /* GPIO_B0_07 */
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__RT1052_PIN( 83, GPIO2, 8), /* GPIO_B0_08 */
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__RT1052_PIN( 84, GPIO2, 9), /* GPIO_B0_09 */
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__RT1052_PIN( 85, GPIO2, 10), /* GPIO_B0_10 */
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__RT1052_PIN( 86, GPIO2, 11), /* GPIO_B0_11 */
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__RT1052_PIN( 87, GPIO2, 12), /* GPIO_B0_12 */
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__RT1052_PIN( 88, GPIO2, 13), /* GPIO_B0_13 */
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__RT1052_PIN( 89, GPIO2, 14), /* GPIO_B0_14 */
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__RT1052_PIN( 90, GPIO2, 15), /* GPIO_B0_15 */
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__RT1052_PIN( 91, GPIO2, 16), /* GPIO_B1_00 */
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__RT1052_PIN( 92, GPIO2, 17), /* GPIO_B1_01 */
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__RT1052_PIN( 93, GPIO2, 18), /* GPIO_B1_02 */
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__RT1052_PIN( 94, GPIO2, 19), /* GPIO_B1_03 */
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__RT1052_PIN( 95, GPIO2, 20), /* GPIO_B1_04 */
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__RT1052_PIN( 96, GPIO2, 21), /* GPIO_B1_05 */
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__RT1052_PIN( 97, GPIO2, 22), /* GPIO_B1_06 */
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__RT1052_PIN( 98, GPIO2, 23), /* GPIO_B1_07 */
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__RT1052_PIN( 99, GPIO2, 24), /* GPIO_B1_08 */
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__RT1052_PIN(100, GPIO2, 25), /* GPIO_B1_09 */
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__RT1052_PIN(101, GPIO2, 26), /* GPIO_B1_10 */
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__RT1052_PIN(102, GPIO2, 27), /* GPIO_B1_11 */
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__RT1052_PIN(103, GPIO2, 28), /* GPIO_B1_12 */
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__RT1052_PIN(104, GPIO2, 29), /* GPIO_B1_13 */
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__RT1052_PIN(105, GPIO2, 30), /* GPIO_B1_14 */
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__RT1052_PIN(106, GPIO2, 31), /* GPIO_B1_15 */
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/* GPIO3 */
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__RT1052_PIN(107, GPIO3, 0), /* GPIO_SD_B1_00 */
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__RT1052_PIN(108, GPIO3, 1), /* GPIO_SD_B1_01 */
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__RT1052_PIN(109, GPIO3, 2), /* GPIO_SD_B1_02 */
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__RT1052_PIN(110, GPIO3, 3), /* GPIO_SD_B1_03 */
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__RT1052_PIN(111, GPIO3, 4), /* GPIO_SD_B1_04 */
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__RT1052_PIN(112, GPIO3, 5), /* GPIO_SD_B1_05 */
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__RT1052_PIN(113, GPIO3, 6), /* GPIO_SD_B1_06 */
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__RT1052_PIN(114, GPIO3, 7), /* GPIO_SD_B1_07 */
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__RT1052_PIN(115, GPIO3, 8), /* GPIO_SD_B1_08 */
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__RT1052_PIN(116, GPIO3, 9), /* GPIO_SD_B1_09 */
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__RT1052_PIN(117, GPIO3, 10), /* GPIO_SD_B1_10 */
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__RT1052_PIN(118, GPIO3, 11), /* GPIO_SD_B1_11 */
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__RT1052_PIN(119, GPIO3, 12), /* GPIO_SD_B0_00 */
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__RT1052_PIN(120, GPIO3, 13), /* GPIO_SD_B0_01 */
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__RT1052_PIN(121, GPIO3, 14), /* GPIO_SD_B0_02 */
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__RT1052_PIN(122, GPIO3, 15), /* GPIO_SD_B0_03 */
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__RT1052_PIN(123, GPIO3, 16), /* GPIO_SD_B0_04 */
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__RT1052_PIN(124, GPIO3, 17), /* GPIO_SD_B0_05 */
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/* GPIO5 */
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__RT1052_PIN(125, GPIO5, 0), /* WAKEUP */
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__RT1052_PIN(126, GPIO5, 1), /* PMIC_ON_REQ */
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__RT1052_PIN(127, GPIO5, 2) /* PMIC_STBY_REQ */
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};
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static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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gpio_pin_config_t gpio;
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rt_uint32_t config_value = 0;
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if((pin > __ARRAY_LEN(rt1052_pin_map)) || (pin == 0))
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{
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return;
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}
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if(rt1052_pin_map[pin].gpio != GPIO5)
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{
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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}
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else
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{
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CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
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}
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/* 配置IOMUXC: 将IO配置为GPIO */
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IOMUXC_SetPinMux(0x401F8010U + pin*4, 0x5U, 0, 0, 0, 0);
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gpio.outputLogic = 0;
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gpio.interruptMode = kGPIO_NoIntmode;
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switch(mode)
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{
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case PIN_MODE_OUTPUT:
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{
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config_value = 0x1030U;
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gpio.direction = kGPIO_DigitalOutput;
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}
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break;
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case PIN_MODE_INPUT:
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{
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config_value = 0x1030U;
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gpio.direction = kGPIO_DigitalInput;
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}
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break;
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case PIN_MODE_INPUT_PULLDOWN:
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{
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config_value = 0x1030U;
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gpio.direction = kGPIO_DigitalInput;
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}
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break;
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case PIN_MODE_INPUT_PULLUP:
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{
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config_value = 0x5030U;
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gpio.direction = kGPIO_DigitalInput;
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}
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break;
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case PIN_MODE_OUTPUT_OD:
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{
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config_value = 0x1830U;
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gpio.direction = kGPIO_DigitalOutput;
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}
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break;
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}
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/* 配置GPIO模式: 上下拉模式, 开漏模, IO翻转速度(50MHz) */
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IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value);
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GPIO_PinInit(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, &gpio);
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}
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static int rt1052_pin_read(rt_device_t dev, rt_base_t pin)
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{
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return GPIO_PinRead(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin);
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}
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static void rt1052_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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{
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GPIO_PinWrite(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, value);
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}
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static struct rt_pin_ops rt1052_pin_ops =
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{
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.pin_mode = rt1052_pin_mode,
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.pin_read = rt1052_pin_read,
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.pin_write = rt1052_pin_write
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};
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int rt_hw_pin_init(void)
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{
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int ret = RT_EOK;
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ret = rt_device_pin_register("pin", &rt1052_pin_ops, RT_NULL);
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return ret;
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}
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INIT_BOARD_EXPORT(rt_hw_pin_init);
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#endif /*RT_USING_PIN */
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@ -0,0 +1,23 @@
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/*
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* File : drv_pin.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-03-13 Liuguang the first version.
|
||||
*/
|
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#ifndef __DRV_PIN_H__
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#define __DRV_PIN_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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int rt_hw_pin_init(void);
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#endif
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -8,7 +8,9 @@
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#define RT_NAME_MAX 8
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#define RT_ALIGN_SIZE 4
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/* RT_THREAD_PRIORITY_8 is not set */
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#define RT_THREAD_PRIORITY_32
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/* RT_THREAD_PRIORITY_256 is not set */
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#define RT_THREAD_PRIORITY_MAX 32
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#define RT_TICK_PER_SECOND 100
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#define RT_DEBUG
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@ -17,6 +19,7 @@
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#define RT_DEBUG_THREAD 0
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#define RT_USING_HOOK
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#define IDLE_THREAD_STACK_SIZE 256
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/* RT_USING_TIMER_SOFT is not set */
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/* Inter-Thread communication */
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@ -25,19 +28,26 @@
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#define RT_USING_EVENT
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#define RT_USING_MAILBOX
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#define RT_USING_MESSAGEQUEUE
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/* RT_USING_SIGNALS is not set */
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/* Memory Management */
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/* RT_USING_MEMPOOL is not set */
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#define RT_USING_MEMHEAP
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/* RT_USING_NOHEAP is not set */
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/* RT_USING_SMALL_MEM is not set */
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/* RT_USING_SLAB is not set */
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#define RT_USING_MEMHEAP_AS_HEAP
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#define RT_USING_HEAP
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/* Kernel Device Object */
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#define RT_USING_DEVICE
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/* RT_USING_INTERRUPT_INFO is not set */
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#define RT_USING_CONSOLE
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#define RT_CONSOLEBUF_SIZE 128
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#define RT_CONSOLE_DEVICE_NAME "uart1"
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||||
/* RT_USING_MODULE is not set */
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||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M7
|
||||
|
@ -50,6 +60,7 @@
|
|||
|
||||
/* C++ features */
|
||||
|
||||
/* RT_USING_CPLUSPLUS is not set */
|
||||
|
||||
/* Command shell */
|
||||
|
||||
|
@ -62,8 +73,10 @@
|
|||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_CMD_SIZE 80
|
||||
/* FINSH_USING_AUTH is not set */
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
/* FINSH_USING_MSH_ONLY is not set */
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
|
@ -78,36 +91,65 @@
|
|||
|
||||
#define RT_DFS_ELM_CODE_PAGE 437
|
||||
#define RT_DFS_ELM_WORD_ACCESS
|
||||
/* RT_DFS_ELM_USE_LFN_0 is not set */
|
||||
/* RT_DFS_ELM_USE_LFN_1 is not set */
|
||||
/* RT_DFS_ELM_USE_LFN_2 is not set */
|
||||
#define RT_DFS_ELM_USE_LFN_3
|
||||
#define RT_DFS_ELM_USE_LFN 3
|
||||
#define RT_DFS_ELM_MAX_LFN 255
|
||||
#define RT_DFS_ELM_DRIVES 2
|
||||
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
|
||||
/* RT_DFS_ELM_USE_ERASE is not set */
|
||||
#define RT_DFS_ELM_REENTRANT
|
||||
#define RT_USING_DFS_DEVFS
|
||||
/* RT_USING_DFS_NET is not set */
|
||||
/* RT_USING_DFS_ROMFS is not set */
|
||||
/* RT_USING_DFS_RAMFS is not set */
|
||||
/* RT_USING_DFS_UFFS is not set */
|
||||
/* RT_USING_DFS_JFFS2 is not set */
|
||||
/* RT_USING_DFS_NFS is not set */
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_USING_SERIAL
|
||||
/* RT_USING_CAN is not set */
|
||||
/* RT_USING_HWTIMER is not set */
|
||||
/* RT_USING_CPUTIME is not set */
|
||||
#define RT_USING_I2C
|
||||
#define RT_USING_I2C_BITOPS
|
||||
#define RT_USING_PIN
|
||||
/* RT_USING_MTD_NOR is not set */
|
||||
/* RT_USING_MTD_NAND is not set */
|
||||
/* RT_USING_RTC is not set */
|
||||
#define RT_USING_SDIO
|
||||
/* RT_USING_SPI is not set */
|
||||
/* RT_USING_WDT is not set */
|
||||
/* RT_USING_WIFI is not set */
|
||||
|
||||
/* Using USB */
|
||||
|
||||
/* RT_USING_USB_HOST is not set */
|
||||
/* RT_USING_USB_DEVICE is not set */
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
/* RT_USING_PTHREADS is not set */
|
||||
/* RT_USING_POSIX is not set */
|
||||
/* HAVE_SYS_SIGNALS is not set */
|
||||
|
||||
/* Network stack */
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
#define RT_USING_LWIP
|
||||
/* RT_USING_LWIP141 is not set */
|
||||
#define RT_USING_LWIP202
|
||||
/* RT_USING_LWIP_IPV6 is not set */
|
||||
/* RT_LWIP_IGMP is not set */
|
||||
#define RT_LWIP_ICMP
|
||||
/* RT_LWIP_SNMP is not set */
|
||||
#define RT_LWIP_DNS
|
||||
#define RT_LWIP_DHCP
|
||||
#define IP_SOF_BROADCAST 1
|
||||
|
@ -120,6 +162,8 @@
|
|||
#define RT_LWIP_MSKADDR "255.255.255.0"
|
||||
#define RT_LWIP_UDP
|
||||
#define RT_LWIP_TCP
|
||||
/* RT_LWIP_RAW is not set */
|
||||
/* RT_LWIP_PPP is not set */
|
||||
#define RT_MEMP_NUM_NETCONN 8
|
||||
#define RT_LWIP_PBUF_NUM 16
|
||||
#define RT_LWIP_RAW_PCB_NUM 4
|
||||
|
@ -134,24 +178,33 @@
|
|||
#define RT_LWIP_ETHTHREAD_PRIORITY 12
|
||||
#define RT_LWIP_ETHTHREAD_STACKSIZE 1024
|
||||
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
|
||||
/* RT_LWIP_REASSEMBLY_FRAG is not set */
|
||||
#define LWIP_NETIF_STATUS_CALLBACK 1
|
||||
#define SO_REUSE 1
|
||||
#define LWIP_SO_RCVTIMEO 1
|
||||
#define LWIP_SO_SNDTIMEO 1
|
||||
#define LWIP_SO_RCVBUF 1
|
||||
/* RT_LWIP_NETIF_LOOPBACK is not set */
|
||||
#define LWIP_NETIF_LOOPBACK 0
|
||||
|
||||
/* Modbus master and slave stack */
|
||||
|
||||
/* RT_USING_MODBUS is not set */
|
||||
/* LWIP_USING_DHCPD is not set */
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
/* RT_USING_VBUS is not set */
|
||||
|
||||
/* Utilities */
|
||||
|
||||
/* RT_USING_LOGTRACE is not set */
|
||||
/* RT_USING_RYM is not set */
|
||||
|
||||
/* ARM CMSIS */
|
||||
|
||||
/* RT_USING_CMSIS_OS is not set */
|
||||
/* RT_USING_RTT_CMSIS is not set */
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
|
@ -159,35 +212,70 @@
|
|||
|
||||
/* RT-Thread GUI Engine */
|
||||
|
||||
/* PKG_USING_GUIENGINE is not set */
|
||||
/* PKG_USING_PERSIMMON is not set */
|
||||
/* PKG_USING_LWEXT4 is not set */
|
||||
/* PKG_USING_PARTITION is not set */
|
||||
/* PKG_USING_SQLITE is not set */
|
||||
/* PKG_USING_RTI is not set */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
/* PKG_USING_PAHOMQTT is not set */
|
||||
/* PKG_USING_WEBCLIENT is not set */
|
||||
/* PKG_USING_MONGOOSE is not set */
|
||||
/* PKG_USING_WEBTERMINAL is not set */
|
||||
/* PKG_USING_CJSON is not set */
|
||||
/* PKG_USING_LJSON is not set */
|
||||
/* PKG_USING_EZXML is not set */
|
||||
/* PKG_USING_NANOPB is not set */
|
||||
/* PKG_USING_GAGENT_CLOUD is not set */
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
/* PKG_USING_WLANMARVELL is not set */
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
/* PKG_USING_WLAN_WICED is not set */
|
||||
/* PKG_USING_COAP is not set */
|
||||
/* PKG_USING_NOPOLL is not set */
|
||||
/* PKG_USING_NETUTILS is not set */
|
||||
|
||||
/* security packages */
|
||||
|
||||
/* PKG_USING_MBEDTLS is not set */
|
||||
/* PKG_USING_libsodium is not set */
|
||||
/* PKG_USING_TINYCRYPT is not set */
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* PKG_USING_JERRYSCRIPT is not set */
|
||||
/* PKG_USING_MICROPYTHON is not set */
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* PKG_USING_OPENMV is not set */
|
||||
|
||||
/* tools packages */
|
||||
|
||||
/* PKG_USING_CMBACKTRACE is not set */
|
||||
/* PKG_USING_EASYLOGGER is not set */
|
||||
/* PKG_USING_SYSTEMVIEW is not set */
|
||||
/* PKG_USING_IPERF is not set */
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* PKG_USING_FASTLZ is not set */
|
||||
/* PKG_USING_MINILZO is not set */
|
||||
/* PKG_USING_QUICKLZ is not set */
|
||||
|
||||
/* example package: hello */
|
||||
|
||||
/* PKG_USING_HELLO is not set */
|
||||
/* PKG_USING_MULTIBUTTON is not set */
|
||||
#define SOC_IMXRT1052
|
||||
#define RT_USING_UART
|
||||
#define RT_USING_UART1
|
||||
|
|
Loading…
Reference in New Issue