diff --git a/bsp/pic32ethernet/application.c b/bsp/pic32ethernet/application.c new file mode 100644 index 000000000..f0d6e3c3b --- /dev/null +++ b/bsp/pic32ethernet/application.c @@ -0,0 +1,50 @@ +/* + * File : application.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2011-05-23 aozima first implementation for PIC32. + */ + +// Adds support for PIC32 Peripheral library functions and macros +#include + +static void delay(void) +{ + volatile unsigned long i; + for(i=0;i<500000;i++); +} + +int rt_application_init(void) +{ + PORTSetPinsDigitalOut(IOPORT_D, BIT_0); + + while(1) + { + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + PORTSetBits(IOPORT_D, BIT_0); + delay(); + PORTClearBits(IOPORT_D, BIT_0); + } + + return 0; +} diff --git a/bsp/pic32ethernet/board.c b/bsp/pic32ethernet/board.c new file mode 100644 index 000000000..b247c9c54 --- /dev/null +++ b/bsp/pic32ethernet/board.c @@ -0,0 +1,63 @@ +/* + * File : board.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006-2011, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2011-05-23 aozima first implementation for PIC32. + */ + +// Adds support for PIC32 Peripheral library functions and macros +#include + +// Configuration Bits +#pragma config FNOSC = PRIPLL // Oscillator Selection +#pragma config FPLLIDIV = DIV_2 // PLL Input Divider (PIC32 Starter Kit: use divide by 2 only) +#pragma config FPLLMUL = MUL_20 // PLL Multiplier +#pragma config FPLLODIV = DIV_1 // PLL Output Divider +#pragma config FPBDIV = DIV_1 // Peripheral Clock divisor +#pragma config FWDTEN = OFF // Watchdog Timer +#pragma config WDTPS = PS1 // Watchdog Timer Postscale +#pragma config FCKSM = CSDCMD // Clock Switching & Fail Safe Clock Monitor +#pragma config OSCIOFNC = OFF // CLKO Enable +#pragma config POSCMOD = XT // Primary Oscillator +#pragma config IESO = OFF // Internal/External Switch-over +#pragma config FSOSCEN = OFF // Secondary Oscillator Enable +#pragma config CP = OFF // Code Protect +#pragma config BWP = OFF // Boot Flash Write Protect +#pragma config PWP = OFF // Program Flash Write Protect +#pragma config ICESEL = ICS_PGx2 // ICE/ICD Comm Channel Select +#pragma config DEBUG = OFF // Debugger Disabled for Starter Kit + +// The following is used by the main application +#define SYS_FREQ (80000000) + +static void rt_hw_show_info(void) +{ + rt_kprintf("\r\n\r\n---------- board info ----------\r\n"); + rt_kprintf("DEVICE_FAMILY: PIC32\r\n"); + rt_kprintf("CPU_ARCHITECTURE: MIPS\r\n"); + rt_kprintf("CPU_FREQ: %uMHz\r\n",SYS_FREQ/1000000UL); +} + +/** +* This function will initial FM3 Easy Kit board. + */ +void rt_hw_board_init() +{ + // Configure the device for maximum performance, but do not change the PBDIV clock divisor. + // Given the options, this function will change the program Flash wait states, + // RAM wait state and enable prefetch cache, but will not change the PBDIV. + // The PBDIV value is already set via the pragma FPBDIV option above. + SYSTEMConfig(SYS_FREQ, SYS_CFG_WAIT_STATES | SYS_CFG_PCACHE); + + rt_hw_console_init(); + + rt_hw_show_info(); +} + diff --git a/bsp/pic32ethernet/console.c b/bsp/pic32ethernet/console.c new file mode 100644 index 000000000..09295bfc8 --- /dev/null +++ b/bsp/pic32ethernet/console.c @@ -0,0 +1,39 @@ +/* + * File : console.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006-2011, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2011-05-23 aozima first implementation for PIC32. + */ +#include + +// Warning: +// if you want to use DBPRINTF in PIC32 Ethernet Starter Kit, +// you project must globl define PIC32_STARTER_KIT and debug in MPLAB. +// but,if you want run app without debug mode,you must remove this features. + +// Adds support for PIC32 Peripheral library functions and macros +#include + +void rt_hw_console_init(void) +{ + //Initialize the DB_UTILS IO channel + DBINIT(); +} + +/** + * This function is used by rt_kprintf to display a string on console. + * + * @param str the displayed string + */ +void rt_hw_console_output(const char* str) +{ + DBPRINTF(str); +} + diff --git a/bsp/pic32ethernet/project.cbp b/bsp/pic32ethernet/project.cbp new file mode 100644 index 000000000..16cb7c2de --- /dev/null +++ b/bsp/pic32ethernet/project.cbp @@ -0,0 +1,109 @@ + + + + + + diff --git a/bsp/pic32ethernet/project.mcp b/bsp/pic32ethernet/project.mcp new file mode 100644 index 000000000..802e2bd32 --- /dev/null +++ b/bsp/pic32ethernet/project.mcp @@ -0,0 +1,134 @@ +[HEADER] +magic_cookie={66E99B07-E706-4689-9E80-9B2582898A13} +file_version=1.0 +device=PIC32MX795F512L +[PATH_INFO] +BuildDirPolicy=BuildDirIsProjectDir +dir_src= +dir_bin=./obj +dir_tmp=./obj +dir_sin= +dir_inc=.;../../include +dir_lib=C:\Program Files\Microchip\MPLAB C32 Suite\lib;C:\Program Files\Microchip\MPLAB C32 Suite\pic32mx\lib +dir_lkr= +[CAT_FILTERS] +filter_src=*.s;*.c +filter_inc=*.h;*.inc +filter_obj=*.o +filter_lib=*.a +filter_lkr=*.ld +[CAT_SUBFOLDERS] +subfolder_src=kernel;pic32 +subfolder_inc= +subfolder_obj= +subfolder_lib= +subfolder_lkr= +[FILE_SUBFOLDERS] +file_000=. +file_001=. +file_002=kernel +file_003=kernel +file_004=kernel +file_005=kernel +file_006=kernel +file_007=kernel +file_008=kernel +file_009=kernel +file_010=kernel +file_011=kernel +file_012=kernel +file_013=kernel +file_014=kernel +file_015=kernel +file_016=kernel +file_017=. +file_018=pic32 +file_019=pic32 +file_020=. +file_021=. +[GENERATED_FILES] +file_000=no +file_001=no +file_002=no +file_003=no +file_004=no +file_005=no +file_006=no +file_007=no +file_008=no +file_009=no +file_010=no +file_011=no +file_012=no +file_013=no +file_014=no +file_015=no +file_016=no +file_017=no +file_018=no +file_019=no +file_020=no +file_021=no +[OTHER_FILES] +file_000=no +file_001=no +file_002=no +file_003=no +file_004=no +file_005=no +file_006=no +file_007=no +file_008=no +file_009=no +file_010=no +file_011=no +file_012=no +file_013=no +file_014=no +file_015=no +file_016=no +file_017=no +file_018=no +file_019=no +file_020=no +file_021=no +[FILE_INFO] +file_000=board.c +file_001=application.c +file_002=..\..\src\device.c +file_003=..\..\src\idle.c +file_004=..\..\src\ipc.c +file_005=..\..\src\irq.c +file_006=..\..\src\kservice.c +file_007=..\..\src\mem.c +file_008=..\..\src\mempool.c +file_009=..\..\src\module.c +file_010=..\..\src\object.c +file_011=..\..\src\rtm.c +file_012=..\..\src\scheduler.c +file_013=..\..\src\slab.c +file_014=..\..\src\thread.c +file_015=..\..\src\timer.c +file_016=..\..\src\clock.c +file_017=startup.c +file_018=..\..\libcpu\mips\pic32\context_gcc.S +file_019=..\..\libcpu\mips\pic32\stack.c +file_020=console.c +file_021=rtconfig.h +[SUITE_INFO] +suite_guid={14495C23-81F8-43F3-8A44-859C583D7760} +suite_state= +[TOOL_SETTINGS] +TS{CB0AF4B8-4022-429D-8F99-8A56782B2C6D}= +TS{9C698E0A-CBC9-4EFF-AE7D-B569F93E7322}=-g -DPIC32_STARTER_KIT +TS{77F59DA1-3C53-4677-AC5F-A03EB0125170}=-Map="$(BINDIR_)$(TARGETBASE).map" -o"$(BINDIR_)$(TARGETBASE).$(TARGETSUFFIX)" +TS{0396C0A1-9052-4E4F-8B84-EF0162B1B4E9}= +[INSTRUMENTED_TRACE] +enable=0 +transport=0 +format=0 +[CUSTOM_BUILD] +Pre-Build= +Pre-BuildEnabled=1 +Post-Build=pic32-size $(BINDIR_)$(TargetName) +Post-BuildEnabled=1 diff --git a/bsp/pic32ethernet/project.mcw b/bsp/pic32ethernet/project.mcw new file mode 100644 index 000000000..8a263ddf5 Binary files /dev/null and b/bsp/pic32ethernet/project.mcw differ diff --git a/bsp/pic32ethernet/readme.txt b/bsp/pic32ethernet/readme.txt new file mode 100644 index 000000000..9625d0c0f --- /dev/null +++ b/bsp/pic32ethernet/readme.txt @@ -0,0 +1,10 @@ +board: PIC32 Ethernet Starter Kit +http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en545713 + +Warning: +Because PIC32 Ethernet Starter Kit have no uart or other. +so,console print use DBPRINTF. +if you want to use DBPRINTF in PIC32 Ethernet Starter Kit, +you project must globl define PIC32_STARTER_KIT and debug in MPLAB. +but,if you want run app without debug mode,you must remove this features. +if not,the app can't run(loop in DBPRINTF). diff --git a/bsp/pic32ethernet/rtconfig.h b/bsp/pic32ethernet/rtconfig.h new file mode 100644 index 000000000..c109fe751 --- /dev/null +++ b/bsp/pic32ethernet/rtconfig.h @@ -0,0 +1,143 @@ +/* RT-Thread config file */ +#ifndef __RTTHREAD_CFG_H__ +#define __RTTHREAD_CFG_H__ + +/* RT_NAME_MAX*/ +#define RT_NAME_MAX 8 + +/* RT_ALIGN_SIZE*/ +#define RT_ALIGN_SIZE 4 + +/* PRIORITY_MAX */ +#define RT_THREAD_PRIORITY_MAX 32 + +/* Tick per Second */ +#define RT_TICK_PER_SECOND 100 + +/* SECTION: RT_DEBUG */ +/* Thread Debug */ +#define RT_DEBUG +//#define THREAD_DEBUG +#define SCHEDULER_DEBUG +//#define IRQ_DEBUG + +#define IDLE_THREAD_STACK_SIZE 1024 + +#define RT_USING_OVERFLOW_CHECK + +/* Using Hook */ +#define RT_USING_HOOK + +/* Using Software Timer */ +/* #define RT_USING_TIMER_SOFT */ +#define RT_TIMER_THREAD_PRIO 4 +#define RT_TIMER_THREAD_STACK_SIZE 512 +#define RT_TIMER_TICK_PER_SECOND 10 + +/* SECTION: IPC */ +/* Using Semaphore*/ +#define RT_USING_SEMAPHORE + +/* Using Mutex */ +#define RT_USING_MUTEX + +/* Using Event */ +#define RT_USING_EVENT + +/* Using MailBox */ +#define RT_USING_MAILBOX + +/* Using Message Queue */ +#define RT_USING_MESSAGEQUEUE + +/* SECTION: Memory Management */ +/* Using Memory Pool Management*/ +#define RT_USING_MEMPOOL + +/* Using Dynamic Heap Management */ +//#define RT_USING_HEAP + +/* Using Small MM */ +#define RT_USING_SMALL_MEM + +/* SECTION: Device System */ +/* Using Device System */ +#define RT_USING_DEVICE +#define RT_USING_UART1 + +/* SECTION: Console options */ +#define RT_USING_CONSOLE +/* the buffer size of console*/ +#define RT_CONSOLEBUF_SIZE 128 + +#define RT_USING_NEWLIB + +/* SECTION: finsh, a C-Express shell */ +//#define RT_USING_FINSH +/* Using symbol table */ +#define FINSH_USING_SYMTAB +#define FINSH_USING_DESCRIPTION +#define __fsymtab_start _alt_partition_FSymTab_start +#define __fsymtab_end _alt_partition_FSymTab_end +#define __vsymtab_start _alt_partition_VSymTab_start +#define __vsymtab_end _alt_partition_VSymTab_end + +/* SECTION: device filesystem */ +//#define RT_USING_DFS +#define RT_USING_DFS_ELMFAT + +/* the max number of mounted filesystem */ +#define DFS_FILESYSTEMS_MAX 2 +/* the max number of opened files */ +#define DFS_FD_MAX 4 +/* the max number of cached sector */ +#define DFS_CACHE_MAX_NUM 4 + +/* SECTION: lwip, a lighwight TCP/IP protocol stack */ +//#define RT_USING_LWIP +/* LwIP uses RT-Thread Memory Management */ +#define RT_LWIP_USING_RT_MEM +/* Enable ICMP protocol*/ +#define RT_LWIP_ICMP +/* Enable UDP protocol*/ +#define RT_LWIP_UDP +/* Enable TCP protocol*/ +#define RT_LWIP_TCP +/* Enable DNS */ +#define RT_LWIP_DNS + +/* the number of simulatenously active TCP connections*/ +#define RT_LWIP_TCP_PCB_NUM 5 + +/* Using DHCP */ +//#define RT_LWIP_DHCP + +/* ip address of target*/ +#define RT_LWIP_IPADDR0 192 +#define RT_LWIP_IPADDR1 168 +#define RT_LWIP_IPADDR2 1 +#define RT_LWIP_IPADDR3 30 + +/* gateway address of target*/ +#define RT_LWIP_GWADDR0 192 +#define RT_LWIP_GWADDR1 168 +#define RT_LWIP_GWADDR2 1 +#define RT_LWIP_GWADDR3 1 + +/* mask address of target*/ +#define RT_LWIP_MSKADDR0 255 +#define RT_LWIP_MSKADDR1 255 +#define RT_LWIP_MSKADDR2 255 +#define RT_LWIP_MSKADDR3 0 + +/* tcp thread options */ +#define RT_LWIP_TCPTHREAD_PRIORITY 12 +#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4 +#define RT_LWIP_TCPTHREAD_STACKSIZE 1024 + +/* ethernet if thread options */ +#define RT_LWIP_ETHTHREAD_PRIORITY 15 +#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4 +#define RT_LWIP_ETHTHREAD_STACKSIZE 512 + +#endif diff --git a/bsp/pic32ethernet/startup.c b/bsp/pic32ethernet/startup.c new file mode 100644 index 000000000..8d407c1a2 --- /dev/null +++ b/bsp/pic32ethernet/startup.c @@ -0,0 +1,107 @@ +/* + * File : startup.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2011-05-23 aozima first implementation for PIC32. + */ + +// Adds support for PIC32 Peripheral library functions and macros +#include + +/** + * This function will startup RT-Thread RTOS. + */ +void rtthread_startup(void) +{ + /* init board */ + rt_hw_board_init(); + + /* show version */ + rt_show_version(); + + /* init tick */ + rt_system_tick_init(); + + /* init kernel object */ + rt_system_object_init(); + + /* init timer system */ + rt_system_timer_init(); + +//#ifdef RT_USING_HEAP +// #ifdef __CC_ARM +// rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)FM3_SRAM_END); +// #elif __ICCARM__ +// rt_system_heap_init(__segment_end("HEAP"), (void*)FM3_SRAM_END); +// #else +// /* init memory system */ +// rt_system_heap_init((void*)&__bss_end, (void*)FM3_SRAM_END); +// #endif +//#endif + + /* init scheduler system */ + rt_system_scheduler_init(); + +//#ifdef RT_USING_DEVICE +// /* register uart0 */ +// rt_hw_serial_register(&uart0_device, "uart0", +// RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, +// &uart0); +// +// /* register uart2, used for RTI debug */ +// rt_hw_serial_register(&uart2_device, "uart2", +// RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, +// &uart2); +// +//#ifdef RT_USING_DFS +//#ifdef RT_USING_DFS_UFFS +// rt_hw_nand_init(); +//#endif +//#endif +// +// /*init all registed devices */ +// rt_device_init_all(); +//#endif + + /* init application */ + rt_application_init(); + +//#ifdef RT_USING_FINSH +// /* init finsh */ +// finsh_system_init(); +//#ifdef RT_USING_DEVICE +// finsh_set_device("uart2"); +//#endif +//#endif + + /* init timer thread */ + rt_system_timer_thread_init(); + + /* init idle thread */ + rt_thread_idle_init(); + + /* start scheduler */ + rt_system_scheduler_start(); + + /* never reach here */ + return ; +} + +int main(void) +{ +// /* disable interrupt first */ +// rt_hw_interrupt_disable(); + + /* startup RT-Thread RTOS */ + rtthread_startup(); + + return 0; +} +