commit
431aa6a955
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@ -195,7 +195,7 @@ static rt_err_t lpc17xx_emac_init(rt_device_t dev)
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for (tout = 1000; tout; tout--);
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for (tout = 1000; tout; tout--);
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/* Wait for hardware reset to end. */
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/* Wait for hardware reset to end. */
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for (tout = 0; tout < 0x100000; tout++)
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for (tout = 0; tout < 10000; tout++)
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{
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{
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regv = read_PHY (PHY_REG_BMCR);
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regv = read_PHY (PHY_REG_BMCR);
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if (!(regv & 0x8000))
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if (!(regv & 0x8000))
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@ -204,15 +204,23 @@ static rt_err_t lpc17xx_emac_init(rt_device_t dev)
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break;
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break;
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}
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}
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}
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}
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if (tout >= 0x100000) return -RT_ERROR; /* reset failed */
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if (tout >= 10000)
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{
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//return -RT_ERROR; /* reset failed */
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rt_kprintf("\tPHY Read PHY_REG_BMSR,Reset timeout,tout: %d.\n",tout);
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}
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/* Check if this is a DP83848C PHY. */
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/* Check if this is a DP83848C PHY. */
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id1 = read_PHY (PHY_REG_IDR1);
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id1 = read_PHY (PHY_REG_IDR1);
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id2 = read_PHY (PHY_REG_IDR2);
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id2 = read_PHY (PHY_REG_IDR2);
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if (((id1 << 16) | (id2 & 0xFFF0)) != DP83848C_ID)
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if (((id1 << 16) | (id2 & 0xFFF0)) != DP83848C_ID)
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return -RT_ERROR;
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{
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// return -RT_ERROR;
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rt_kprintf("\tPHY Read PHY_REG_IDRx,PHY chip isn't DP83848C,Chip ID is %d.\n",((id1 << 16) | (id2 & 0xFFF0)));
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}
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else
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{
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/* Configure the PHY device */
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/* Configure the PHY device */
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/* Configure the PHY device */
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/* Configure the PHY device */
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switch (lpc17xx_emac_device.phy_mode)
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switch (lpc17xx_emac_device.phy_mode)
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@ -221,7 +229,7 @@ static rt_err_t lpc17xx_emac_init(rt_device_t dev)
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/* Use auto negotiation about the link speed. */
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/* Use auto negotiation about the link speed. */
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write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
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write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
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/* Wait to complete Auto_Negotiation. */
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/* Wait to complete Auto_Negotiation. */
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for (tout = 0; tout < 0x100000; tout++)
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for (tout = 0; tout < 200000; tout++)
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{
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{
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regv = read_PHY (PHY_REG_BMSR);
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regv = read_PHY (PHY_REG_BMSR);
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if (regv & 0x0020)
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if (regv & 0x0020)
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@ -230,6 +238,10 @@ static rt_err_t lpc17xx_emac_init(rt_device_t dev)
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break;
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break;
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}
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}
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}
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}
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if(tout >= 200000)
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{
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rt_kprintf("\tPHY Read PHY_REG_BMSR,Auto nego timeout,tout: %d.\n",tout);
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}
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break;
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break;
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case EMAC_PHY_10MBIT:
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case EMAC_PHY_10MBIT:
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/* Connect at 10MBit */
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/* Connect at 10MBit */
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@ -240,10 +252,11 @@ static rt_err_t lpc17xx_emac_init(rt_device_t dev)
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write_PHY (PHY_REG_BMCR, PHY_FULLD_100M);
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write_PHY (PHY_REG_BMCR, PHY_FULLD_100M);
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break;
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break;
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}
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}
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if (tout >= 0x100000) return -RT_ERROR; // auto_neg failed
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}
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//if (tout >= 0x100000) return -RT_ERROR; // auto_neg failed
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/* Check the link status. */
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/* Check the link status. */
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for (tout = 0; tout < 0x10000; tout++)
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for (tout = 0; tout < 100; tout++)
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{
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{
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regv = read_PHY (PHY_REG_STS);
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regv = read_PHY (PHY_REG_STS);
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if (regv & 0x0001)
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if (regv & 0x0001)
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@ -252,8 +265,11 @@ static rt_err_t lpc17xx_emac_init(rt_device_t dev)
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break;
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break;
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}
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}
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}
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}
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if (tout >= 0x10000) return -RT_ERROR;
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if (tout >= 100)
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{
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//return -RT_ERROR;
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rt_kprintf("\tPHY Read PHY_REG_BMSR,Link on timeout,tout: %d.\n",tout);
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}
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/* Configure Full/Half Duplex mode. */
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/* Configure Full/Half Duplex mode. */
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if (regv & 0x0004)
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if (regv & 0x0004)
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{
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{
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