add NRZ feature on K60

bsp/K60Fxxxx/K60/K60.pro

@@ -0,0 +1,43 @@
+HEADERS += \
+    ../rtconfig.h \
+    ../drivers/led.h \
+    ../drivers/drv_uart.h \
+    ../drivers/board.h \
+    ../../../components/drivers/include/rtdevice.h \
+    ../../../components/drivers/include/drivers/serial.h \
+    ../../../include/rtthread.h \
+    ../../../include/rtservice.h \
+    ../../../include/rtm.h \
+    ../../../include/rthw.h \
+    ../../../include/rtdef.h \
+    ../../../include/rtdebug.h \
+    ../../../src/module.h \
+    ../../../../../../../../Keil/ARM/INC/Freescale/Kinetis/MK60F12.H
+
+SOURCES += \
+    ../applications/startup.c \
+    ../applications/application.c \
+    ../drivers/system_MK60F12.c \
+    ../drivers/led.c \
+    ../drivers/drv_uart.c \
+    ../drivers/board.c \
+    ../../../components/drivers/serial/serial.c \
+    ../../../src/timer.c \
+    ../../../src/thread.c \
+    ../../../src/slab.c \
+    ../../../src/scheduler.c \
+    ../../../src/object.c \
+    ../../../src/module.c \
+    ../../../src/mempool.c \
+    ../../../src/memheap.c \
+    ../../../src/mem.c \
+    ../../../src/kservice.c \
+    ../../../src/irq.c \
+    ../../../src/ipc.c \
+    ../../../src/idle.c \
+    ../../../src/device.c \
+    ../../../src/clock.c
+
+OTHER_FILES += \
+    ../drivers/startup_MK60F12.s \
+    ../../../src/SConscript

bsp/K60Fxxxx/drivers/drv_uart.c

@@ -39,52 +39,83 @@ static struct k60_serial_device _k60_node =
 
 static rt_err_t _configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
-    unsigned int reg_C1 = 0,reg_C4 = 0,reg_BDH = 0,reg_BDL = 0,reg_S2,reg_BRFA=0;
+    unsigned int reg_C1 = 0,reg_C3 = 0,reg_C4 = 0,reg_BDH = 0,reg_BDL = 0,reg_S2,reg_BRFA=0;
     unsigned int cal_SBR = 0;
     UART_Type *uart_reg;
 
-    /* ref : drivers\system_MK60F12.c Line 64 ,BusClock = 60MHz */
+    /* ref : drivers\system_MK60F12.c Line 64 ,BusClock = 60MHz
+     * calculate baud_rate
+     */
     uart_reg = ((struct k60_serial_device *)serial->parent.user_data)->baseAddress;
 
-    //calc SBR
+    /* calc SBR */
     cal_SBR = 60000000 / (16 * cfg->baud_rate);
 
-    //calc baud_rate
+    /* calc baud_rate */
     reg_BDH = (cal_SBR & 0x1FFF) >> 8 & 0x00FF;
     reg_BDL = cal_SBR & 0x00FF;
 
-    //fractional divider
+    /* fractional divider */
     reg_BRFA = ((60000*32000)/(cfg->baud_rate * 16)) - (cal_SBR * 32);
 
     reg_C4 = (unsigned char)(reg_BRFA & 0x001F);
 
-    //calc bit_order
+    /*
+     * set bit order
+     */
     if (cfg->bit_order == BIT_ORDER_LSB)
         reg_S2 &= ~(UART_S2_MSBF_MASK<<UART_S2_MSBF_SHIFT);
     else if (cfg->bit_order == BIT_ORDER_MSB)
         reg_S2 |= UART_S2_MSBF_MASK<<UART_S2_MSBF_SHIFT;
 
-    //calc data_bits
+    /*
+     * set data_bits
+     */
     if (cfg->data_bits == DATA_BITS_8)
         reg_C1 &= ~(UART_C1_M_MASK<<UART_C1_M_SHIFT);
     else if (cfg->data_bits == DATA_BITS_9)
         reg_C1 |= UART_C1_M_MASK<<UART_C1_M_SHIFT;
 
-    //clac parity
+    /*
+     * set parity
+     */
     if (cfg->parity == PARITY_NONE)
-        reg_C1 &= ~(UART_C1_PE_MASK<<UART_C1_PE_SHIFT);
+    {
+        reg_C1 &= ~(UART_C1_PE_MASK);
+    }
     else
     {
-        reg_C1 &= ~(UART_C1_PE_MASK<<UART_C1_PE_SHIFT);
+        /* first ,set parity enable bit */
+        reg_C1 |= (UART_C1_PE_MASK);
         
+        /* second ,determine parity odd or even*/
         if (cfg->parity == PARITY_ODD)
-            reg_C1 |= UART_C1_PT_MASK<<UART_C1_PT_SHIFT;
+            reg_C1 |= UART_C1_PT_MASK;
         if (cfg->parity == PARITY_EVEN)
-            reg_C1 &= ~(UART_C1_PT_MASK<<UART_C1_PT_SHIFT);
+            reg_C1 &= ~(UART_C1_PT_MASK);
+    }
+
+    /*
+     * set stop bit
+     * not supported on Tower? need ur help!
+     */
+
+    /*
+     * set NZR mode
+     * not tested
+     */
+    if(cfg->invert != NRZ_NORMAL)
+    {
+        /* not in normal mode ,set inverted polarity */
+        reg_C3 |= UART_C3_TXINV_MASK;
     }
 
     switch( (int)uart_reg)
     {
+    /* Tower board use UART5 for communication
+     * if you're using other board
+     * set clock and pin map for UARTx
+     */
     case UART5_BASE:
 
         //set UART5 clock