update stm32 ethernet code
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@133 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
bernard.xiong
parent
68b84d808a
commit
34f3f2538b
|
|
@ -26,7 +26,11 @@
|
|||
/*@{*/
|
||||
|
||||
#ifdef RT_USING_LWIP
|
||||
#include "enc28j60.h"
|
||||
#ifdef STM32F10X_CL
|
||||
extern void rt_hw_stm32_eth_init(void);
|
||||
#else
|
||||
#include "enc28j60.h"
|
||||
#endif
|
||||
#include <netif/ethernetif.h>
|
||||
#endif
|
||||
|
||||
|
|
@ -36,6 +40,7 @@ extern void finsh_system_init(void);
|
|||
extern void finsh_set_device(const char* device);
|
||||
#endif
|
||||
|
||||
/* bss end definitions for heap init */
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#elif __ICCARM__
|
||||
|
|
@ -105,7 +110,7 @@ void rtthread_startup(void)
|
|||
/* init hardware serial device */
|
||||
rt_hw_usart_init();
|
||||
|
||||
#ifdef RT_USINS_DFS
|
||||
#ifdef RT_USING_DFS
|
||||
/* init sdcard driver */
|
||||
#if STM32_USE_SDIO
|
||||
rt_hw_sdcard_init();
|
||||
|
|
@ -118,7 +123,11 @@ void rtthread_startup(void)
|
|||
eth_system_device_init();
|
||||
|
||||
/* register ethernetif device */
|
||||
#ifdef STM32F10X_CL
|
||||
rt_hw_stm32_eth_init();
|
||||
#else
|
||||
rt_hw_enc28j60_init();
|
||||
#endif
|
||||
#endif
|
||||
|
||||
rt_hw_rtc_init();
|
||||
|
|
@ -132,7 +141,7 @@ void rtthread_startup(void)
|
|||
#ifdef RT_USING_FINSH
|
||||
/* init finsh */
|
||||
finsh_system_init();
|
||||
finsh_set_device("uart1");
|
||||
finsh_set_device(FINSH_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
/* init idle thread */
|
||||
|
|
|
|||
|
|
@ -3059,16 +3059,18 @@ uint32_t ETH_HandlePTPRxPkt(uint8_t *ppkt, uint32_t *PTPRxTab)
|
|||
#include <netif/ethernetif.h>
|
||||
#include "lwipopts.h"
|
||||
|
||||
#define STM32_ETH_DEBUG 1
|
||||
#define STM32_ETH_DEBUG 0
|
||||
|
||||
#define MII_MODE /* MII mode for STM3210C-EVAL Board (MB784) (check jumpers setting) */
|
||||
|
||||
#define DP83848_PHY /* Ethernet pins mapped on STM3210C-EVAL Board */
|
||||
#define PHY_ADDRESS 0x01 /* Relative to STM3210C-EVAL Board */
|
||||
|
||||
#define ETH_RXBUFNB 8
|
||||
#define ETH_RXBUFNB 4
|
||||
#define ETH_TXBUFNB 2
|
||||
ETH_InitTypeDef ETH_InitStructure;
|
||||
ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB];
|
||||
rt_uint8_t Rx_Buff[ETH_RXBUFNB][ETH_MAX_PACKET_SIZE], Tx_Buff[ETH_TXBUFNB][ETH_MAX_PACKET_SIZE];
|
||||
static ETH_InitTypeDef ETH_InitStructure;
|
||||
static ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB];
|
||||
static rt_uint8_t Rx_Buff[ETH_RXBUFNB][ETH_MAX_PACKET_SIZE], Tx_Buff[ETH_TXBUFNB][ETH_MAX_PACKET_SIZE];
|
||||
|
||||
#define MAX_ADDR_LEN 6
|
||||
struct rt_stm32_eth
|
||||
|
|
@ -3080,6 +3082,8 @@ struct rt_stm32_eth
|
|||
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
|
||||
};
|
||||
static struct rt_stm32_eth stm32_eth_device;
|
||||
static struct rt_semaphore tx_wait;
|
||||
static rt_bool_t tx_is_waiting = RT_FALSE;
|
||||
|
||||
/* interrupt service routine */
|
||||
void rt_hw_stm32_eth_isr(int irqno)
|
||||
|
|
@ -3087,9 +3091,11 @@ void rt_hw_stm32_eth_isr(int irqno)
|
|||
rt_uint32_t status;
|
||||
|
||||
status = ETH->DMASR;
|
||||
|
||||
rt_kprintf("eth dma status: 0x%08x\n", ETH->DMASR);
|
||||
|
||||
#if STM32_ETH_DEBUG
|
||||
rt_kprintf("eth dma status: 0x%08x\n", ETH->DMASR);
|
||||
#endif
|
||||
|
||||
//Clear received IT
|
||||
if ((status & ETH_DMA_IT_NIS) != (u32)RESET)
|
||||
ETH->DMASR = (u32)ETH_DMA_IT_NIS;
|
||||
|
|
@ -3113,6 +3119,12 @@ void rt_hw_stm32_eth_isr(int irqno)
|
|||
|
||||
if (ETH_GetDMAITStatus(ETH_DMA_IT_T) == SET) /* packet transmission */
|
||||
{
|
||||
if (tx_is_waiting == RT_TRUE)
|
||||
{
|
||||
tx_is_waiting = RT_FALSE;
|
||||
rt_sem_release(&tx_wait);
|
||||
}
|
||||
|
||||
ETH_DMAClearITPendingBit(ETH_DMA_IT_T);
|
||||
}
|
||||
}
|
||||
|
|
@ -3220,14 +3232,22 @@ rt_err_t rt_stm32_eth_tx( rt_device_t dev, struct pbuf* p)
|
|||
rt_uint32_t offset;
|
||||
|
||||
/* Check if the descriptor is owned by the ETHERNET DMA (when set) or CPU (when reset) */
|
||||
if((DMATxDescToSet->Status & ETH_DMATxDesc_OWN) != (uint32_t)RESET)
|
||||
while ((DMATxDescToSet->Status & ETH_DMATxDesc_OWN) != (uint32_t)RESET)
|
||||
{
|
||||
rt_err_t result;
|
||||
rt_uint32_t level;
|
||||
|
||||
#if STM32_ETH_DEBUG
|
||||
rt_kprintf("error: own bit set\n");
|
||||
#endif
|
||||
level = rt_hw_interrupt_disable();
|
||||
tx_is_waiting = RT_TRUE;
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
/* Return ERROR: OWN bit set */
|
||||
return -RT_ERROR;
|
||||
/* it's own bit set, wait it */
|
||||
result = rt_sem_take(&tx_wait, RT_WAITING_FOREVER);
|
||||
if (result == RT_EOK) break;
|
||||
if (result == -RT_ERROR) return -RT_ERROR;
|
||||
}
|
||||
|
||||
#if STM32_ETH_DEBUG
|
||||
|
|
@ -3272,6 +3292,9 @@ rt_err_t rt_stm32_eth_tx( rt_device_t dev, struct pbuf* p)
|
|||
ETH->DMASR = ETH_DMASR_TBUS;
|
||||
/* Transmit Poll Demand to resume DMA transmission*/
|
||||
ETH->DMATPDR = 0;
|
||||
#if STM32_ETH_DEBUG
|
||||
rt_kprintf("transmit poll demand\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Update the ETHERNET DMA global Tx descriptor with next Tx decriptor */
|
||||
|
|
@ -3397,7 +3420,11 @@ static void RCC_Configuration(void)
|
|||
{
|
||||
/* Enable ETHERNET clock */
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_ETH_MAC | RCC_AHBPeriph_ETH_MAC_Tx |
|
||||
RCC_AHBPeriph_ETH_MAC_Rx, ENABLE);
|
||||
RCC_AHBPeriph_ETH_MAC_Rx, ENABLE);
|
||||
|
||||
/* Enable GPIOs clocks */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC |
|
||||
RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE| RCC_APB2Periph_AFIO, ENABLE);
|
||||
}
|
||||
|
||||
static void NVIC_Configuration(void)
|
||||
|
|
@ -3527,8 +3554,8 @@ static void GPIO_Configuration(void)
|
|||
|
||||
void rt_hw_stm32_eth_init()
|
||||
{
|
||||
GPIO_Configuration();
|
||||
RCC_Configuration();
|
||||
GPIO_Configuration();
|
||||
NVIC_Configuration();
|
||||
|
||||
stm32_eth_device.dev_addr[0] = 0x01;
|
||||
|
|
@ -3549,6 +3576,9 @@ void rt_hw_stm32_eth_init()
|
|||
stm32_eth_device.parent.eth_rx = rt_stm32_eth_rx;
|
||||
stm32_eth_device.parent.eth_tx = rt_stm32_eth_tx;
|
||||
|
||||
/* init tx semaphore */
|
||||
rt_sem_init(&tx_wait, "tx_wait", 0, RT_IPC_FLAG_FIFO);
|
||||
|
||||
/* register eth device */
|
||||
eth_device_init(&(stm32_eth_device.parent), "e0");
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x_it.h"
|
||||
#include <rtthread.h>
|
||||
#include "board.h"
|
||||
|
||||
/** @addtogroup Template_Project
|
||||
* @{
|
||||
|
|
@ -258,7 +259,7 @@ void USART3_IRQHandler(void)
|
|||
*******************************************************************************/
|
||||
void SDIO_IRQHandler(void)
|
||||
{
|
||||
#ifdef RT_USING_DFS
|
||||
#if defined(RT_USING_DFS) && STM32_USE_SDIO
|
||||
extern int SD_ProcessIRQSrc(void);
|
||||
|
||||
/* enter interrupt */
|
||||
|
|
@ -281,7 +282,7 @@ void SDIO_IRQHandler(void)
|
|||
*******************************************************************************/
|
||||
void EXTI0_IRQHandler(void)
|
||||
{
|
||||
#ifdef RT_USING_LWIP
|
||||
#if defined(RT_USING_LWIP) && !defined(STM32F10X_CL)
|
||||
extern void enc28j60_isr(void);
|
||||
|
||||
/* enter interrupt */
|
||||
|
|
@ -297,6 +298,28 @@ void EXTI0_IRQHandler(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ETH_IRQHandler
|
||||
* Description : This function handles ETH interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void ETH_IRQHandler(void)
|
||||
{
|
||||
#if defined(RT_USING_LWIP) && defined(STM32F10X_CL)
|
||||
extern void rt_hw_stm32_eth_isr(void);
|
||||
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_hw_stm32_eth_isr();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
Loading…
Reference in New Issue