update pic32 bsp
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1480 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
parent
f00548260a
commit
1df295f8f4
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@ -14,37 +14,54 @@
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// Adds support for PIC32 Peripheral library functions and macros
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// Adds support for PIC32 Peripheral library functions and macros
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#include <plib.h>
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#include <plib.h>
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#include <rtthread.h>
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static void delay(void)
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ALIGN(RT_ALIGN_SIZE)
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int thread_led1_stack[512];
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struct rt_thread thread_led1;
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void thread_led1_entry(void* parameter)
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{
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{
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volatile unsigned long i;
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// configure PORTD.RD1 = output
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for(i=0;i<500000;i++);
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mPORTDSetPinsDigitalOut(BIT_1);
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while(1)
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{
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// .. Toggle the LED
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mPORTDToggleBits(BIT_1);
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rt_thread_delay( RT_TICK_PER_SECOND ); /* delay 1s */
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}
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}
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static void thread_led2_entry(void* parameter)
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{
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// configure PORTD.RD2 = output
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mPORTDSetPinsDigitalOut(BIT_2);
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while (1)
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{
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// .. Toggle the LED
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mPORTDToggleBits(BIT_2);
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rt_thread_delay( RT_TICK_PER_SECOND*5 ); /* delay 1s */
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}
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}
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}
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int rt_application_init(void)
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int rt_application_init(void)
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{
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{
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PORTSetPinsDigitalOut(IOPORT_D, BIT_0);
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rt_thread_t thread;
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while(1)
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rt_thread_init(&thread_led1,
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{
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"led1",
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delay();
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thread_led1_entry, RT_NULL,
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delay();
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&thread_led1_stack[0], sizeof(thread_led1_stack),
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delay();
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20, 10);
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delay();
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rt_thread_startup(&thread_led1);
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delay();
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delay();
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/* create led2 thread */
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delay();
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thread = rt_thread_create("led2",
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delay();
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thread_led2_entry, RT_NULL,
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delay();
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1024,
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delay();
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20, 5);
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delay();
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if (thread != RT_NULL)
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delay();
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rt_thread_startup(thread);
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delay();
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delay();
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PORTSetBits(IOPORT_D, BIT_0);
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delay();
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PORTClearBits(IOPORT_D, BIT_0);
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}
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return 0;
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return 0;
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}
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}
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@ -14,6 +14,7 @@
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// Adds support for PIC32 Peripheral library functions and macros
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// Adds support for PIC32 Peripheral library functions and macros
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#include <plib.h>
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#include <plib.h>
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#include <rtthread.h>
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// Configuration Bits
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// Configuration Bits
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#pragma config FNOSC = PRIPLL // Oscillator Selection
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#pragma config FNOSC = PRIPLL // Oscillator Selection
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@ -35,7 +36,12 @@
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#pragma config DEBUG = OFF // Debugger Disabled for Starter Kit
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#pragma config DEBUG = OFF // Debugger Disabled for Starter Kit
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// The following is used by the main application
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// The following is used by the main application
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#define SYS_FREQ (80000000)
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#define SYS_FREQ (80000000UL)
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#define PB_DIV 8
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#define PRESCALE 256
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#define TOGGLES_PER_SEC RT_TICK_PER_SECOND
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#define T1_TICK (SYS_FREQ/PB_DIV/PRESCALE/TOGGLES_PER_SEC)
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static void rt_hw_show_info(void)
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static void rt_hw_show_info(void)
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{
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{
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@ -45,6 +51,17 @@ static void rt_hw_show_info(void)
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rt_kprintf("CPU_FREQ: %uMHz\r\n",SYS_FREQ/1000000UL);
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rt_kprintf("CPU_FREQ: %uMHz\r\n",SYS_FREQ/1000000UL);
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}
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}
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static void rt_hw_timer_handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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/**
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/**
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* This function will initial FM3 Easy Kit board.
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* This function will initial FM3 Easy Kit board.
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*/
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*/
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@ -59,5 +76,56 @@ void rt_hw_board_init()
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rt_hw_console_init();
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rt_hw_console_init();
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rt_hw_show_info();
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rt_hw_show_info();
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// enable multi-vector interrupts
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INTEnableSystemMultiVectoredInt();
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rt_hw_interrupt_disable();
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// // STEP 2. configure the core timer
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// OpenCoreTimer(CORE_TICK_RATE);
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//
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// // set up the core timer interrupt with a prioirty of 2 and zero sub-priority
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// mConfigIntCoreTimer((CT_INT_ON | CT_INT_PRIOR_2 | CT_INT_SUB_PRIOR_0));
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// STEP 2. configure Timer 1 using internal clock, 1:256 prescale
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OpenTimer1(T1_ON | T1_SOURCE_INT | T1_PS_1_256, T1_TICK);
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// set up the timer interrupt with a priority of 2
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ConfigIntTimer1(T1_INT_ON | T1_INT_PRIOR_2);
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/* Setup the software interrupt. */
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mConfigIntCoreSW0( CSW_INT_ON | CSW_INT_PRIOR_1 | CSW_INT_SUB_PRIOR_0 );
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// configure PORTD.RD0 = output,Toggle in CoreSW0Handler.
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mPORTDSetPinsDigitalOut(BIT_0);
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}
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}
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void __ISR(_TIMER_1_VECTOR, ipl2) Timer1Handler(void)
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{
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// clear the interrupt flag
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mT1ClearIntFlag();
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// .. things to do
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rt_hw_timer_handler();
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// // .. in this case, toggle the LED
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// mPORTDToggleBits(BIT_1);
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}
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//void __ISR(_CORE_TIMER_VECTOR, ipl2) CoreTimerHandler(void)
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//{
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// // clear the interrupt flag
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// mCTClearIntFlag();
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//
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// // .. things to do
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// rt_hw_timer_handler();
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//
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// // update the period
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// UpdateCoreTimer(CORE_TICK_RATE);
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//
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// // .. Toggle the LED
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// mPORTDToggleBits(BIT_1);
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//}
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void __ISR(_CORE_SOFTWARE_0_VECTOR, ipl2) CoreSW0Handler(void);
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@ -24,7 +24,7 @@
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void rt_hw_console_init(void)
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void rt_hw_console_init(void)
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{
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{
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//Initialize the DB_UTILS IO channel
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//Initialize the DB_UTILS IO channel
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DBINIT();
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// DBINIT();
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}
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}
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/**
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/**
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*/
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*/
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void rt_hw_console_output(const char* str)
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void rt_hw_console_output(const char* str)
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{
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{
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DBPRINTF(str);
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// DBPRINTF(str);
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}
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}
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@ -36,6 +36,16 @@
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<Unit filename="..\..\include\rthw.h" />
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<Unit filename="..\..\include\rthw.h" />
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<Unit filename="..\..\include\rtm.h" />
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<Unit filename="..\..\include\rtm.h" />
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<Unit filename="..\..\include\rtthread.h" />
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<Unit filename="..\..\include\rtthread.h" />
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<Unit filename="..\..\libcpu\mips\common\asm.h" />
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<Unit filename="..\..\libcpu\mips\common\cache.c">
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<Option compilerVar="CC" />
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</Unit>
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<Unit filename="..\..\libcpu\mips\common\cache.h" />
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<Unit filename="..\..\libcpu\mips\common\exception.h" />
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<Unit filename="..\..\libcpu\mips\common\mips.inc" />
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<Unit filename="..\..\libcpu\mips\common\mipscfg.h" />
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<Unit filename="..\..\libcpu\mips\common\mipsregs.h" />
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<Unit filename="..\..\libcpu\mips\common\stackframe.h" />
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<Unit filename="..\..\libcpu\mips\pic32\context_gcc.S" />
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<Unit filename="..\..\libcpu\mips\pic32\context_gcc.S" />
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<Unit filename="..\..\libcpu\mips\pic32\interrupt.c">
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<Unit filename="..\..\libcpu\mips\pic32\interrupt.c">
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<Option compilerVar="CC" />
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<Option compilerVar="CC" />
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file_018=pic32
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file_018=pic32
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file_019=pic32
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file_019=pic32
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file_020=.
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file_020=.
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file_021=.
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file_021=pic32
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file_022=.
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[GENERATED_FILES]
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[GENERATED_FILES]
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file_000=no
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file_000=no
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file_001=no
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file_001=no
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file_019=no
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file_019=no
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file_020=no
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file_020=no
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file_021=no
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file_021=no
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file_022=no
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[OTHER_FILES]
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[OTHER_FILES]
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file_000=no
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file_000=no
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file_001=no
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file_001=no
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file_019=no
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file_019=no
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file_020=no
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file_020=no
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file_021=no
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file_021=no
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file_022=no
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[FILE_INFO]
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[FILE_INFO]
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file_000=board.c
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file_000=board.c
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file_001=application.c
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file_001=application.c
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file_018=..\..\libcpu\mips\pic32\context_gcc.S
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file_018=..\..\libcpu\mips\pic32\context_gcc.S
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file_019=..\..\libcpu\mips\pic32\stack.c
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file_019=..\..\libcpu\mips\pic32\stack.c
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file_020=console.c
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file_020=console.c
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file_021=rtconfig.h
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file_021=..\..\libcpu\mips\pic32\interrupt.c
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file_022=rtconfig.h
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[SUITE_INFO]
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[SUITE_INFO]
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suite_guid={14495C23-81F8-43F3-8A44-859C583D7760}
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suite_guid={14495C23-81F8-43F3-8A44-859C583D7760}
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suite_state=
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suite_state=
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[TOOL_SETTINGS]
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[TOOL_SETTINGS]
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TS{CB0AF4B8-4022-429D-8F99-8A56782B2C6D}=
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TS{CB0AF4B8-4022-429D-8F99-8A56782B2C6D}=--gdwarf-2
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TS{9C698E0A-CBC9-4EFF-AE7D-B569F93E7322}=-g -DPIC32_STARTER_KIT
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TS{9C698E0A-CBC9-4EFF-AE7D-B569F93E7322}=-g -DPIC32_STARTER_KIT
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TS{77F59DA1-3C53-4677-AC5F-A03EB0125170}=-Map="$(BINDIR_)$(TARGETBASE).map" -o"$(BINDIR_)$(TARGETBASE).$(TARGETSUFFIX)"
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TS{77F59DA1-3C53-4677-AC5F-A03EB0125170}=-Map="$(BINDIR_)$(TARGETBASE).map" -o"$(BINDIR_)$(TARGETBASE).$(TARGETSUFFIX)"
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TS{0396C0A1-9052-4E4F-8B84-EF0162B1B4E9}=
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TS{0396C0A1-9052-4E4F-8B84-EF0162B1B4E9}=
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Binary file not shown.
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@ -55,7 +55,7 @@
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#define RT_USING_MEMPOOL
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#define RT_USING_MEMPOOL
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/* Using Dynamic Heap Management */
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/* Using Dynamic Heap Management */
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//#define RT_USING_HEAP
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#define RT_USING_HEAP
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/* Using Small MM */
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/* Using Small MM */
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#define RT_USING_SMALL_MEM
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#define RT_USING_SMALL_MEM
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// Adds support for PIC32 Peripheral library functions and macros
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// Adds support for PIC32 Peripheral library functions and macros
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#include <plib.h>
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#include <plib.h>
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#include <rtthread.h>
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extern int _ramfunc_end;
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#define PIC32_SRAM_END (0xA0000000+0x8000) //795F512L 512KB
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/**
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/**
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* This function will startup RT-Thread RTOS.
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* This function will startup RT-Thread RTOS.
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/* init timer system */
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/* init timer system */
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rt_system_timer_init();
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rt_system_timer_init();
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//#ifdef RT_USING_HEAP
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#ifdef RT_USING_HEAP
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// #ifdef __CC_ARM
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/* init memory system */
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// rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)FM3_SRAM_END);
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rt_system_heap_init((void*)&_ramfunc_end, (void*)PIC32_SRAM_END);
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// #elif __ICCARM__
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#endif
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// rt_system_heap_init(__segment_end("HEAP"), (void*)FM3_SRAM_END);
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// #else
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// /* init memory system */
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// rt_system_heap_init((void*)&__bss_end, (void*)FM3_SRAM_END);
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// #endif
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//#endif
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/* init scheduler system */
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/* init scheduler system */
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rt_system_scheduler_init();
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rt_system_scheduler_init();
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int main(void)
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int main(void)
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{
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{
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// /* disable interrupt first */
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/* disable interrupt first */
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// rt_hw_interrupt_disable();
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rt_hw_interrupt_disable();
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/* startup RT-Thread RTOS */
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/* startup RT-Thread RTOS */
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rtthread_startup();
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rtthread_startup();
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