chinky/rtt-f030
chinky/rtt-f030
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This commit is contained in:
chinky 2018-08-25 16:27:39 +08:00
parent 6a8edc0932
commit 0e88d49e77
16 changed files with 905 additions and 1148 deletions
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8
bsp/stm32f0/.config
View File

@ -58,7 +58,9 @@ CONFIG_RT_USING_HEAP=y
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
# CONFIG_RT_USING_CONSOLE is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart2"
# CONFIG_RT_USING_MODULE is not set
#
@ -237,8 +239,8 @@ CONFIG_RT_USING_LIBC=y
# example package: hello
#
# CONFIG_PKG_USING_HELLO is not set
CONFIG_STM32F030RB=y
CONFIG_STM32F030R8=y
# CONFIG_RT_USING_HSI is not set
CONFIG_RT_HSE_VALUE=8000000
# CONFIG_RT_USING_UART1 is not set
# CONFIG_RT_USING_UART2 is not set
CONFIG_RT_USING_UART2=y

6
bsp/stm32f0/Kconfig
View File

@ -20,9 +20,9 @@ source "$PKGS_DIR/Kconfig"
choice
prompt "Device type"
default STM32F030RB
config STM32F030RB
bool "STM32F030RB"
default STM32F030R8
config STM32F030R8
bool "STM32F030R8"
endchoice

150
bsp/stm32f0/Libraries/SConscript
View File

@ -7,131 +7,45 @@ cwd = GetCurrentDir()
# The set of source files associated with this SConscript file.
src = Split("""
CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_crc.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_irda.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_smartcard.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_usart.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_wwdg.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_adc.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_crc.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dac.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_i2c.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rtc.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_sdmmc.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_spi.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c
STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_wwdg.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c
""")
#device options
if GetDepend(['STM32F100RC']) or GetDepend(['STM32F100RC']) or GetDepend(['STM32F100RC']) or GetDepend(['STM32F100RD']) or GetDepend(['STM32F100RE']) or GetDepend(['STM32F100VD']) or GetDepend(['STM32F100VE']) or GetDepend(['STM32F100ZD']) or GetDepend(['STM32F100ZE']):
STM32_TYPE = 'STM32F100xE'
if GetDepend(['STM32F101TB']) or GetDepend(['STM32F101CB']) or GetDepend(['STM32F101RB']) or GetDepend(['STM32F101VB']):
STM32_TYPE = 'STM32F101xB'
if GetDepend(['STM32F101RC']) or GetDepend(['STM32F101VC']) or GetDepend(['STM32F101ZC']) or GetDepend(['STM32F101RD']) or GetDepend(['STM32F101RE']) or GetDepend(['STM32F101VD']) or GetDepend(['STM32F101VE']) or GetDepend(['STM32F101ZD']) or GetDepend(['STM32F101ZE']):
STM32_TYPE = 'STM32F101xE'
if GetDepend(['STM32F101RF']) or GetDepend(['STM32F101RG']) or GetDepend(['STM32F101VF']) or GetDepend(['STM32F101VG']) or GetDepend(['STM32F101ZF']) or GetDepend(['STM32F101ZG']):
STM32_TYPE = 'STM32F101xG'
if GetDepend(['STM32F102CB']) or GetDepend(['STM32F102RB']):
STM32_TYPE = 'STM32F102xB'
if GetDepend(['STM32F103T8']) or GetDepend(['STM32F103TB']) or GetDepend(['STM32F103C8']) or GetDepend(['STM32F103CB']) or GetDepend(['STM32F103R8']) or GetDepend(['STM32F103RB']) or GetDepend(['STM32F103V8']) or GetDepend(['STM32F103VB']):
STM32_TYPE = 'STM32F103xB'
if GetDepend(['STM32F103RC']) or GetDepend(['STM32F103VC']) or GetDepend(['STM32F103ZC']) or GetDepend(['STM32F103RD']) or GetDepend(['STM32F103RE']) or GetDepend(['STM32F103VD']) or GetDepend(['STM32F103VE']) or GetDepend(['STM32F103ZD']) or GetDepend(['STM32F103ZE']):
STM32_TYPE = 'STM32F103xE'
if GetDepend(['STM32F103RF']) or GetDepend(['STM32F103RG']) or GetDepend(['STM32F103VF']) or GetDepend(['STM32F103VG']) or GetDepend(['STM32F103ZF']) or GetDepend(['STM32F103ZG']):
STM32_TYPE = 'STM32F103xG'
if GetDepend(['STM32F105R8']) or GetDepend(['STM32F105RB']) or GetDepend(['STM32F105RC']) or GetDepend(['STM32F105V8']) or GetDepend(['STM32F105VB']) or GetDepend(['STM32F105VC']):
STM32_TYPE = 'STM32F105xC'
if GetDepend(['STM32F107RB']) or GetDepend(['STM32F107RC']) or GetDepend(['STM32F107VB']) or GetDepend(['STM32F107VC']):
STM32_TYPE = 'STM32F107xC'
if STM32_TYPE == 'STM32F100xB' or STM32_TYPE == 'STM32F100xE':
src = src + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cec.c']
if GetDepend(['STM32F030R8']):
STM32_TYPE = 'STM32F030x8'
if STM32_TYPE == 'STM32F103x6' or STM32_TYPE == 'STM32F103xB' or STM32_TYPE == 'STM32F103xE' or STM32_TYPE == 'STM32F103xG' or STM32_TYPE == 'STM32F105xC' or STM32_TYPE == 'STM32F107xC':
src = src + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c']
if STM32_TYPE == 'STM32F100xB' or STM32_TYPE == 'STM32F100xE' or STM32_TYPE == 'STM32F101xE' or STM32_TYPE == 'STM32F101xG' or STM32_TYPE == 'STM32F103xE' or STM32_TYPE == 'STM32F103xG' or STM32_TYPE == 'STM32F105xC' or STM32_TYPE == 'STM32F107xC':
src = src + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c'] + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c']
if STM32_TYPE == 'STM32F107xC':
src = src + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_eth.c']
if STM32_TYPE == 'STM32F107xC' or STM32_TYPE == 'STM32F105xC':
src = src + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_hcd.c']
if STM32_TYPE == 'STM32F107xC' or STM32_TYPE == 'STM32F105xC' or STM32_TYPE == 'STM32F103xE' or STM32_TYPE == 'STM32F103xG':
src = src + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2s.c']
if STM32_TYPE == 'STM32F103xE' or STM32_TYPE == 'STM32F103xG':
src = src + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_mmc.c'] + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sd.c']
if STM32_TYPE == 'STM32F101xE' or STM32_TYPE == 'STM32F103xE' or STM32_TYPE == 'STM32F101xG' or STM32_TYPE == 'STM32F103xG':
src = src + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_nand.c'] + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pccard.c']
if STM32_TYPE == 'STM32F101xE' or STM32_TYPE == 'STM32F103xE' or STM32_TYPE == 'STM32F101xG' or STM32_TYPE == 'STM32F103xG' or STM32_TYPE == 'STM32F100xE':
src = src + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_nor.c'] + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c']
if STM32_TYPE == 'STM32F102x6' or STM32_TYPE == 'STM32F102xB' or STM32_TYPE == 'STM32F103x6' or STM32_TYPE == 'STM32F103xB' or STM32_TYPE == 'STM32F103xE' or STM32_TYPE == 'STM32F103xG' or STM32_TYPE == 'STM32F105xC' or STM32_TYPE == 'STM32F107xC':
src = src + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c'] + ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c']
# starupt scripts for each STM32 kind
startup_scripts = {}
startup_scripts['STM32F100xB'] = 'startup_stm32f100xb.s'
startup_scripts['STM32F100xE'] = 'startup_stm32f100xe.s'
startup_scripts['STM32F101x6'] = 'startup_stm32f101x6.s'
startup_scripts['STM32F101xB'] = 'startup_stm32f101xb.s'
startup_scripts['STM32F101xE'] = 'startup_stm32f101xe.s'
startup_scripts['STM32F101xG'] = 'startup_stm32f101xg.s'
startup_scripts['STM32F102x6'] = 'startup_stm32f102x6.s'
startup_scripts['STM32F102xB'] = 'startup_stm32f102xb.s'
startup_scripts['STM32F103x6'] = 'startup_stm32f103x6.s'
startup_scripts['STM32F103xB'] = 'startup_stm32f103xb.s'
startup_scripts['STM32F103xE'] = 'startup_stm32f103xe.s'
startup_scripts['STM32F103xG'] = 'startup_stm32f103xe.s'
startup_scripts['STM32F105xC'] = 'startup_stm32f105xc.s'
startup_scripts['STM32F107xC'] = 'startup_stm32f107xc.s'
# add for startup script
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
src = src + ['CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/' + startup_scripts[STM32_TYPE]]
folder = 'gcc'
elif rtconfig.CROSS_TOOL == 'keil':
src = src + ['CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/' + startup_scripts[STM32_TYPE]]
folder = 'arm'
elif rtconfig.CROSS_TOOL == 'iar':
src = src + ['CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/' + startup_scripts[STM32_TYPE]]
folder = 'iar'
path = [cwd + '/CMSIS/Device/ST/STM32F1xx/Include',
cwd + '/STM32F1xx_HAL_Driver/Inc',
#CMSIS/Device\ST\STM32F0xx\Source\Templates\gcc\startup_stm32f030x8.s
src += ['CMSIS/Device/ST/STM32F0xx/Source/Templates/' + folder
+ '/startup_' + STM32_TYPE.lower() + '.s']
#add for cpppath
path = [cwd + '/CMSIS/Device/ST/STM32F0xx/Include',
cwd + '/STM32F0xx_HAL_Driver/Inc',
cwd + '/CMSIS/Include']
if GetDepend(['RT_USING_RTT_CMSIS']):

23
bsp/stm32f0/SConstruct
View File

@ -12,24 +12,23 @@ from building import *
TARGET = 'rtthread-stm32.' + rtconfig.TARGET_EXT
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env = Environment(tools=['mingw'],
AS=rtconfig.AS, ASFLAGS=rtconfig.AFLAGS,
CC=rtconfig.CC, CCFLAGS=rtconfig.CFLAGS,
AR=rtconfig.AR, ARFLAGS='-rc',
LINK=rtconfig.LINK, LINKFLAGS=rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
env.Replace(
CCCOM=['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS=[''])
env.Replace(
LINKCOM=['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# make a building
objs = PrepareBuilding(env, RTT_ROOT)
DoBuilding(TARGET, objs)

2
bsp/stm32f0/applications/led.c
View File

@ -18,7 +18,7 @@ static struct rt_thread led_thread;
void rt_hw_led_init(void)
{
rt_pin_mode(LD2_PIN, PIN_MODE_OUT);
rt_pin_mode(LD2_PIN, PIN_MODE_OUTPUT);
}
static void led_thread_entry(void* parameter)

18
bsp/stm32f0/drivers/SConscript
View File

@ -7,23 +7,21 @@ cwd = GetCurrentDir()
# add the general drivers.
src = Split("""
board.c
stm32f1xx_it.c
stm32f0xx_it.c
system_stm32f0xx.c
""")
if GetDepend(['RT_USING_PIN']):
src += ['drv_gpio.c']
if GetDepend(['RT_USING_SERIAL']):
src += ['drv_usart.c']
if GetDepend(['RT_USING_SPI']):
src += ['drv_spi.c']
if GetDepend(['RT_USING_USB_DEVICE']):
src += ['drv_usb.c']
if GetDepend(['RT_USING_SDCARD']):
src += ['drv_sdcard.c']
# if GetDepend(['RT_USING_SPI']):
# src += ['drv_spi.c']
# if GetDepend(['RT_USING_USB_DEVICE']):
# src += ['drv_usb.c']
# if GetDepend(['RT_USING_SDCARD']):
# src += ['drv_sdcard.c']
if rtconfig.CROSS_TOOL == 'gcc':
src += ['startup_stm32f030x8.s']
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)

403
bsp/stm32f0/drivers/drv_gpio.c
View File

@ -155,97 +155,6 @@ static void drv_clock_enable(rt_uint16_t gpio_pin)
/* STM32 GPIO driver */
static const rt_uint16_t pins[] =
{
#if (STM32F0XX_PIN_NUMBERS == 36)
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(7, A, 0),
__STM32_PIN(8, A, 1),
__STM32_PIN(9, A, 2),
__STM32_PIN(10, A, 3),
__STM32_PIN(11, A, 4),
__STM32_PIN(12, A, 5),
__STM32_PIN(13, A, 6),
__STM32_PIN(14, A, 7),
__STM32_PIN(15, B, 0),
__STM32_PIN(16, B, 1),
__STM32_PIN(17, B, 2),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(20, A, 8),
__STM32_PIN(21, A, 9),
__STM32_PIN(22, A, 10),
__STM32_PIN(23, A, 11),
__STM32_PIN(24, A, 12),
__STM32_PIN(25, A, 13),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(28, A, 14),
__STM32_PIN(29, A, 15),
__STM32_PIN(30, B, 3),
__STM32_PIN(31, B, 4),
__STM32_PIN(32, B, 5),
__STM32_PIN(33, B, 6),
__STM32_PIN(34, B, 7),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
#endif
#if (STM32F0XX_PIN_NUMBERS == 48)
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(2, C, 13),
__STM32_PIN(3, C, 14),
__STM32_PIN(4, C, 15),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(10, A, 0),
__STM32_PIN(11, A, 1),
__STM32_PIN(12, A, 2),
__STM32_PIN(13, A, 3),
__STM32_PIN(14, A, 4),
__STM32_PIN(15, A, 5),
__STM32_PIN(16, A, 6),
__STM32_PIN(17, A, 7),
__STM32_PIN(18, B, 0),
__STM32_PIN(19, B, 1),
__STM32_PIN(20, B, 2),
__STM32_PIN(21, B, 10),
__STM32_PIN(22, B, 11),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(25, B, 12),
__STM32_PIN(26, B, 13),
__STM32_PIN(27, B, 14),
__STM32_PIN(28, B, 15),
__STM32_PIN(29, A, 8),
__STM32_PIN(30, A, 9),
__STM32_PIN(31, A, 10),
__STM32_PIN(32, A, 11),
__STM32_PIN(33, A, 12),
__STM32_PIN(34, A, 13),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(37, A, 14),
__STM32_PIN(38, A, 15),
__STM32_PIN(39, B, 3),
__STM32_PIN(40, B, 4),
__STM32_PIN(41, B, 5),
__STM32_PIN(42, B, 6),
__STM32_PIN(43, B, 7),
__STM32_PIN_DEFAULT,
__STM32_PIN(45, B, 8),
__STM32_PIN(46, B, 9),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
#endif
#if (STM32F0XX_PIN_NUMBERS == 64)
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
@ -313,256 +222,6 @@ static const rt_uint16_t pins[] =
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
#endif
#if (STM32F0XX_PIN_NUMBERS == 100)
__STM32_PIN_DEFAULT,
__STM32_PIN(1, E, 2),
__STM32_PIN(2, E, 3),
__STM32_PIN(3, E, 4),
__STM32_PIN(4, E, 5),
__STM32_PIN(5, E, 6),
__STM32_PIN_DEFAULT,
__STM32_PIN(7, C, 13),
__STM32_PIN(8, C, 14),
__STM32_PIN(9, C, 15),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(15, C, 0),
__STM32_PIN(16, C, 1),
__STM32_PIN(17, C, 2),
__STM32_PIN(18, C, 3),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(23, A, 0),
__STM32_PIN(24, A, 1),
__STM32_PIN(25, A, 2),
__STM32_PIN(26, A, 3),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(29, A, 4),
__STM32_PIN(30, A, 5),
__STM32_PIN(31, A, 6),
__STM32_PIN(32, A, 7),
__STM32_PIN(33, C, 4),
__STM32_PIN(34, C, 5),
__STM32_PIN(35, B, 0),
__STM32_PIN(36, B, 1),
__STM32_PIN(37, B, 2),
__STM32_PIN(38, E, 7),
__STM32_PIN(39, E, 8),
__STM32_PIN(40, E, 9),
__STM32_PIN(41, E, 10),
__STM32_PIN(42, E, 11),
__STM32_PIN(43, E, 12),
__STM32_PIN(44, E, 13),
__STM32_PIN(45, E, 14),
__STM32_PIN(46, E, 15),
__STM32_PIN(47, B, 10),
__STM32_PIN(48, B, 11),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(51, B, 12),
__STM32_PIN(52, B, 13),
__STM32_PIN(53, B, 14),
__STM32_PIN(54, B, 15),
__STM32_PIN(55, D, 8),
__STM32_PIN(56, D, 9),
__STM32_PIN(57, D, 10),
__STM32_PIN(58, D, 11),
__STM32_PIN(59, D, 12),
__STM32_PIN(60, D, 13),
__STM32_PIN(61, D, 14),
__STM32_PIN(62, D, 15),
__STM32_PIN(63, C, 6),
__STM32_PIN(64, C, 7),
__STM32_PIN(65, C, 8),
__STM32_PIN(66, C, 9),
__STM32_PIN(67, A, 8),
__STM32_PIN(68, A, 9),
__STM32_PIN(69, A, 10),
__STM32_PIN(70, A, 11),
__STM32_PIN(71, A, 12),
__STM32_PIN(72, A, 13),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(76, A, 14),
__STM32_PIN(77, A, 15),
__STM32_PIN(78, C, 10),
__STM32_PIN(79, C, 11),
__STM32_PIN(80, C, 12),
__STM32_PIN(81, D, 0),
__STM32_PIN(82, D, 1),
__STM32_PIN(83, D, 2),
__STM32_PIN(84, D, 3),
__STM32_PIN(85, D, 4),
__STM32_PIN(86, D, 5),
__STM32_PIN(87, D, 6),
__STM32_PIN(88, D, 7),
__STM32_PIN(89, B, 3),
__STM32_PIN(90, B, 4),
__STM32_PIN(91, B, 5),
__STM32_PIN(92, B, 6),
__STM32_PIN(93, B, 7),
__STM32_PIN_DEFAULT,
__STM32_PIN(95, B, 8),
__STM32_PIN(96, B, 9),
__STM32_PIN(97, E, 0),
__STM32_PIN(98, E, 1),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
#endif
#if (STM32F0XX_PIN_NUMBERS == 144)
__STM32_PIN_DEFAULT,
__STM32_PIN(1, E, 2),
__STM32_PIN(2, E, 3),
__STM32_PIN(3, E, 4),
__STM32_PIN(4, E, 5),
__STM32_PIN(5, E, 6),
__STM32_PIN_DEFAULT,
__STM32_PIN(7, C, 13),
__STM32_PIN(8, C, 14),
__STM32_PIN(9, C, 15),
__STM32_PIN(10, F, 0),
__STM32_PIN(11, F, 1),
__STM32_PIN(12, F, 2),
__STM32_PIN(13, F, 3),
__STM32_PIN(14, F, 4),
__STM32_PIN(15, F, 5),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(18, F, 6),
__STM32_PIN(19, F, 7),
__STM32_PIN(20, F, 8),
__STM32_PIN(21, F, 9),
__STM32_PIN(22, F, 10),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(26, C, 0),
__STM32_PIN(27, C, 1),
__STM32_PIN(28, C, 2),
__STM32_PIN(29, C, 3),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(34, A, 0),
__STM32_PIN(35, A, 1),
__STM32_PIN(36, A, 2),
__STM32_PIN(37, A, 3),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(40, A, 4),
__STM32_PIN(41, A, 5),
__STM32_PIN(42, A, 6),
__STM32_PIN(43, A, 7),
__STM32_PIN(44, C, 4),
__STM32_PIN(45, C, 5),
__STM32_PIN(46, B, 0),
__STM32_PIN(47, B, 1),
__STM32_PIN(48, B, 2),
__STM32_PIN(49, F, 11),
__STM32_PIN(50, F, 12),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(53, F, 13),
__STM32_PIN(54, F, 14),
__STM32_PIN(55, F, 15),
__STM32_PIN(56, G, 0),
__STM32_PIN(57, G, 1),
__STM32_PIN(58, E, 7),
__STM32_PIN(59, E, 8),
__STM32_PIN(60, E, 9),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(63, E, 10),
__STM32_PIN(64, E, 11),
__STM32_PIN(65, E, 12),
__STM32_PIN(66, E, 13),
__STM32_PIN(67, E, 14),
__STM32_PIN(68, E, 15),
__STM32_PIN(69, B, 10),
__STM32_PIN(70, B, 11),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(73, B, 12),
__STM32_PIN(74, B, 13),
__STM32_PIN(75, B, 14),
__STM32_PIN(76, B, 15),
__STM32_PIN(77, D, 8),
__STM32_PIN(78, D, 9),
__STM32_PIN(79, D, 10),
__STM32_PIN(80, D, 11),
__STM32_PIN(81, D, 12),
__STM32_PIN(82, D, 13),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(85, D, 14),
__STM32_PIN(86, D, 15),
__STM32_PIN(87, G, 2),
__STM32_PIN(88, G, 3),
__STM32_PIN(89, G, 4),
__STM32_PIN(90, G, 5),
__STM32_PIN(91, G, 6),
__STM32_PIN(92, G, 7),
__STM32_PIN(93, G, 8),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(96, C, 6),
__STM32_PIN(97, C, 7),
__STM32_PIN(98, C, 8),
__STM32_PIN(99, C, 9),
__STM32_PIN(100, A, 8),
__STM32_PIN(101, A, 9),
__STM32_PIN(102, A, 10),
__STM32_PIN(103, A, 11),
__STM32_PIN(104, A, 12),
__STM32_PIN(105, A, 13),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(109, A, 14),
__STM32_PIN(110, A, 15),
__STM32_PIN(111, C, 10),
__STM32_PIN(112, C, 11),
__STM32_PIN(113, C, 12),
__STM32_PIN(114, D, 0),
__STM32_PIN(115, D, 1),
__STM32_PIN(116, D, 2),
__STM32_PIN(117, D, 3),
__STM32_PIN(118, D, 4),
__STM32_PIN(119, D, 5),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(122, D, 6),
__STM32_PIN(123, D, 7),
__STM32_PIN(124, G, 9),
__STM32_PIN(125, G, 10),
__STM32_PIN(126, G, 11),
__STM32_PIN(127, G, 12),
__STM32_PIN(128, G, 13),
__STM32_PIN(129, G, 14),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(132, G, 15),
__STM32_PIN(133, B, 3),
__STM32_PIN(134, B, 4),
__STM32_PIN(135, B, 5),
__STM32_PIN(136, B, 6),
__STM32_PIN(137, B, 7),
__STM32_PIN_DEFAULT,
__STM32_PIN(139, B, 8),
__STM32_PIN(140, B, 9),
__STM32_PIN(141, E, 0),
__STM32_PIN(142, E, 1),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
#endif
};
struct pin_irq_map
@ -572,22 +231,22 @@ struct pin_irq_map
};
static const struct pin_irq_map pin_irq_map[] =
{
{GPIO_PIN_0, EXTI0_IRQn},
{GPIO_PIN_1, EXTI1_IRQn},
{GPIO_PIN_2, EXTI2_IRQn},
{GPIO_PIN_3, EXTI3_IRQn},
{GPIO_PIN_4, EXTI4_IRQn},
{GPIO_PIN_5, EXTI9_5_IRQn},
{GPIO_PIN_6, EXTI9_5_IRQn},
{GPIO_PIN_7, EXTI9_5_IRQn},
{GPIO_PIN_8, EXTI9_5_IRQn},
{GPIO_PIN_9, EXTI9_5_IRQn},
{GPIO_PIN_10, EXTI15_10_IRQn},
{GPIO_PIN_11, EXTI15_10_IRQn},
{GPIO_PIN_12, EXTI15_10_IRQn},
{GPIO_PIN_13, EXTI15_10_IRQn},
{GPIO_PIN_14, EXTI15_10_IRQn},
{GPIO_PIN_15, EXTI15_10_IRQn},
{GPIO_PIN_0, EXTI0_1_IRQn},
{GPIO_PIN_1, EXTI0_1_IRQn},
{GPIO_PIN_2, EXTI2_3_IRQn},
{GPIO_PIN_3, EXTI2_3_IRQn},
{GPIO_PIN_4, EXTI4_15_IRQn},
{GPIO_PIN_5, EXTI4_15_IRQn},
{GPIO_PIN_6, EXTI4_15_IRQn},
{GPIO_PIN_7, EXTI4_15_IRQn},
{GPIO_PIN_8, EXTI4_15_IRQn},
{GPIO_PIN_9, EXTI4_15_IRQn},
{GPIO_PIN_10, EXTI4_15_IRQn},
{GPIO_PIN_11, EXTI4_15_IRQn},
{GPIO_PIN_12, EXTI4_15_IRQn},
{GPIO_PIN_13, EXTI4_15_IRQn},
{GPIO_PIN_14, EXTI4_15_IRQn},
{GPIO_PIN_15, EXTI4_15_IRQn},
};
struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
{
@ -867,55 +526,31 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
pin_irq_hdr(GPIO_Pin);
}
void EXTI0_IRQHandler(void)
void EXTI0_1_IRQHandler(void)
{
rt_interrupt_enter();
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
rt_interrupt_leave();
}
void EXTI1_IRQHandler(void)
{
rt_interrupt_enter();
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
rt_interrupt_leave();
}
void EXTI2_IRQHandler(void)
void EXTI2_3_IRQHandler(void)
{
rt_interrupt_enter();
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
rt_interrupt_leave();
}
void EXTI3_IRQHandler(void)
{
rt_interrupt_enter();
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
rt_interrupt_leave();
}
void EXTI4_IRQHandler(void)
void EEXTI4_15_IRQHandler(void)
{
rt_interrupt_enter();
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
rt_interrupt_leave();
}
void EXTI9_5_IRQHandler(void)
{
rt_interrupt_enter();
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5);
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_6);
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7);
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8);
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
rt_interrupt_leave();
}
void EXTI15_10_IRQHandler(void)
{
rt_interrupt_enter();
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_10);
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_11);
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12);

342
bsp/stm32f0/drivers/drv_usart.c Normal file
View File

@ -0,0 +1,342 @@
/*
* File : drv_usart.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
* 2013-05-13 aozima update for kehong-lingtai.
* 2015-01-31 armink make sure the serial transmit complete in putc()
* 2016-05-13 armink add DMA Rx mode
* 2017-01-19 aubr.cool add interrupt Tx mode
* 2017-04-13 aubr.cool correct Rx parity err
* 2017-10-20 ZYH porting to HAL Libraries(with out DMA)
* 2017-11-15 ZYH update to 3.0.0
*/
#include "board.h"
#include <rtdevice.h>
#include <drv_usart.h>
/* STM32 uart driver */
struct stm32_uart
{
UART_HandleTypeDef huart;
IRQn_Type irq;
};
static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct stm32_uart *uart;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart = (struct stm32_uart *)serial->parent.user_data;
uart->huart.Init.BaudRate = cfg->baud_rate;
uart->huart.Init.HwFlowCtl = UART_HWCONTROL_NONE;
uart->huart.Init.Mode = UART_MODE_TX_RX;
uart->huart.Init.OverSampling = UART_OVERSAMPLING_16;
switch (cfg->data_bits)
{
case DATA_BITS_8:
uart->huart.Init.WordLength = UART_WORDLENGTH_8B;
break;
case DATA_BITS_9:
uart->huart.Init.WordLength = UART_WORDLENGTH_9B;
break;
default:
uart->huart.Init.WordLength = UART_WORDLENGTH_8B;
break;
}
switch (cfg->stop_bits)
{
case STOP_BITS_1:
uart->huart.Init.StopBits = UART_STOPBITS_1;
break;
case STOP_BITS_2:
uart->huart.Init.StopBits = UART_STOPBITS_2;
break;
default:
uart->huart.Init.StopBits = UART_STOPBITS_1;
break;
}
switch (cfg->parity)
{
case PARITY_NONE:
uart->huart.Init.Parity = UART_PARITY_NONE;
break;
case PARITY_ODD:
uart->huart.Init.Parity = UART_PARITY_ODD;
break;
case PARITY_EVEN:
uart->huart.Init.Parity = UART_PARITY_EVEN;
break;
default:
uart->huart.Init.Parity = UART_PARITY_NONE;
break;
}
if (HAL_UART_Init(&uart->huart) != HAL_OK)
{
return RT_ERROR;
}
return RT_EOK;
}
static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct stm32_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct stm32_uart *)serial->parent.user_data;
switch (cmd)
{
/* disable interrupt */
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
NVIC_DisableIRQ(uart->irq);
/* disable interrupt */
__HAL_UART_DISABLE_IT(&uart->huart, USART_IT_RXNE);
break;
/* enable interrupt */
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
NVIC_EnableIRQ(uart->irq);
/* enable interrupt */
__HAL_UART_ENABLE_IT(&uart->huart, USART_IT_RXNE);
break;
}
return RT_EOK;
}
static int stm32_putc(struct rt_serial_device *serial, char c)
{
struct stm32_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct stm32_uart *)serial->parent.user_data;
while (__HAL_UART_GET_FLAG(&uart->huart, UART_FLAG_TXE) == RESET);
uart->huart.Instance->TDR = c;
return 1;
}
static int stm32_getc(struct rt_serial_device *serial)
{
int ch;
struct stm32_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct stm32_uart *)serial->parent.user_data;
ch = -1;
if (__HAL_UART_GET_FLAG(&uart->huart, UART_FLAG_RXNE) != RESET)
{
ch = uart->huart.Instance->RDR & 0xff;
}
return ch;
}
/**
* Uart common interrupt process. This need add to uart ISR.
*
* @param serial serial device
*/
static void uart_isr(struct rt_serial_device *serial)
{
struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
RT_ASSERT(uart != RT_NULL);
if ((__HAL_UART_GET_FLAG(&uart->huart, UART_FLAG_RXNE) != RESET) && (__HAL_UART_GET_IT_SOURCE(&uart->huart, UART_IT_RXNE) != RESET))
{
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
__HAL_UART_CLEAR_FLAG(&uart->huart, UART_FLAG_RXNE);
}
}
static const struct rt_uart_ops stm32_uart_ops =
{
stm32_configure,
stm32_control,
stm32_putc,
stm32_getc,
};
#if defined(RT_USING_UART1)
/* UART1 device driver structure */
struct stm32_uart uart1 =
{
{USART1},
USART1_IRQn
};
struct rt_serial_device serial1;
void USART1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
uart_isr(&serial1);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* RT_USING_UART1 */
#if defined(RT_USING_UART2)
/* UART1 device driver structure */
struct stm32_uart uart2 =
{
{USART2},
USART2_IRQn
};
struct rt_serial_device serial2;
void USART2_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
uart_isr(&serial2);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* RT_USING_UART2 */
static void MX_USART_UART_Init(UART_HandleTypeDef *uartHandle);
int rt_hw_usart_init(void)
{
struct stm32_uart *uart;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#if defined(RT_USING_UART1)
uart = &uart1;
config.baud_rate = BAUD_RATE_115200;
serial1.ops = &stm32_uart_ops;
serial1.config = config;
MX_USART_UART_Init(&uart->huart);
/* register UART1 device */
rt_hw_serial_register(&serial1, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
#endif /* RT_USING_UART1 */
#if defined(RT_USING_UART2)
uart = &uart2;
config.baud_rate = BAUD_RATE_115200;
serial2.ops = &stm32_uart_ops;
serial2.config = config;
MX_USART_UART_Init(&uart->huart);
/* register UART1 device */
rt_hw_serial_register(&serial2, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
#endif /* RT_USING_UART1 */
return 0;
}
INIT_BOARD_EXPORT(rt_hw_usart_init);
static void MX_USART_UART_Init(UART_HandleTypeDef *uartHandle)
{
rt_err_t result;
uartHandle->Init.BaudRate = 115200;
uartHandle->Init.WordLength = UART_WORDLENGTH_8B;
uartHandle->Init.StopBits = UART_STOPBITS_1;
uartHandle->Init.Parity = UART_PARITY_NONE;
uartHandle->Init.Mode = UART_MODE_TX_RX;
uartHandle->Init.HwFlowCtl = UART_HWCONTROL_NONE;
uartHandle->Init.OverSampling = UART_OVERSAMPLING_16;
result = HAL_UART_Init(uartHandle);
RT_ASSERT(result == HAL_OK);
}
/* USART2 init function */
void HAL_UART_MspInit(UART_HandleTypeDef *uartHandle)
{
GPIO_InitTypeDef GPIO_InitStruct;
if (uartHandle->Instance == USART1)
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* USART1 clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
}
else if (uartHandle->Instance == USART2)
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/* USART2 clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_2;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART2 interrupt Init */
HAL_NVIC_SetPriority(USART2_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */
}
}
void HAL_UART_MspDeInit(UART_HandleTypeDef *uartHandle)
{
if (uartHandle->Instance == USART1)
{
/* USER CODE BEGIN USART1_MspDeInit 0 */
/* USER CODE END USART1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9 | GPIO_PIN_10);
/* USART1 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */
}
else if (uartHandle->Instance == USART2)
{
/* USER CODE BEGIN USART2_MspDeInit 0 */
/* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2 | GPIO_PIN_3);
/* USART2 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspDeInit 1 */
/* USER CODE END USART2_MspDeInit 1 */
}
}

19
bsp/stm32f0/drivers/drv_usart.h Normal file
View File

@ -0,0 +1,19 @@
/*
* File : usart.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
*/
#ifndef __USART_H__
#define __USART_H__
#include <rthw.h>
#include <rtthread.h>
int rt_hw_usart_init(void);
#endif

286
bsp/stm32f0/drivers/startup_stm32f030x8.s
View File

@ -1,286 +0,0 @@
/**
******************************************************************************
* @file startup_stm32f030x8.s
* @author MCD Application Team
* @brief STM32F030x8 devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M0 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m0
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =_estack
mov sp, r0 /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
ldr r2, =_sidata
movs r3, #0
b LoopCopyDataInit
CopyDataInit:
ldr r4, [r2, r3]
str r4, [r0, r3]
adds r3, r3, #4
LoopCopyDataInit:
adds r4, r0, r3
cmp r4, r1
bcc CopyDataInit
/* Zero fill the bss segment. */
ldr r2, =_sbss
ldr r4, =_ebss
movs r3, #0
b LoopFillZerobss
FillZerobss:
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M0. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word 0
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler /* Window WatchDog */
.word 0 /* Reserved */
.word RTC_IRQHandler /* RTC through the EXTI line */
.word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
.word 0 /* Reserved */
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
.word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */
.word ADC1_IRQHandler /* ADC1 */
.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word 0 /* Reserved */
.word TIM3_IRQHandler /* TIM3 */
.word TIM6_IRQHandler /* TIM6 */
.word 0 /* Reserved */
.word TIM14_IRQHandler /* TIM14 */
.word TIM15_IRQHandler /* TIM15 */
.word TIM16_IRQHandler /* TIM16 */
.word TIM17_IRQHandler /* TIM17 */
.word I2C1_IRQHandler /* I2C1 */
.word I2C2_IRQHandler /* I2C2 */
.word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak RTC_IRQHandler
.thumb_set RTC_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_1_IRQHandler
.thumb_set EXTI0_1_IRQHandler,Default_Handler
.weak EXTI2_3_IRQHandler
.thumb_set EXTI2_3_IRQHandler,Default_Handler
.weak EXTI4_15_IRQHandler
.thumb_set EXTI4_15_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_3_IRQHandler
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
.weak DMA1_Channel4_5_IRQHandler
.thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
.weak ADC1_IRQHandler
.thumb_set ADC1_IRQHandler,Default_Handler
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM6_IRQHandler
.thumb_set TIM6_IRQHandler,Default_Handler
.weak TIM14_IRQHandler
.thumb_set TIM14_IRQHandler,Default_Handler
.weak TIM15_IRQHandler
.thumb_set TIM15_IRQHandler,Default_Handler
.weak TIM16_IRQHandler
.thumb_set TIM16_IRQHandler,Default_Handler
.weak TIM17_IRQHandler
.thumb_set TIM17_IRQHandler,Default_Handler
.weak I2C1_IRQHandler
.thumb_set I2C1_IRQHandler,Default_Handler
.weak I2C2_IRQHandler
.thumb_set I2C2_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

24
bsp/stm32f0/drivers/stm32f0xx_it.c
View File

@ -45,20 +45,20 @@
/* Cortex-M0 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
// /**
// * @brief This function handles System tick timer.
// */
// void SysTick_Handler(void)
// {
// /* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
HAL_SYSTICK_IRQHandler();
/* USER CODE BEGIN SysTick_IRQn 1 */
// /* USER CODE END SysTick_IRQn 0 */
// HAL_IncTick();
// HAL_SYSTICK_IRQHandler();
// /* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
// /* USER CODE END SysTick_IRQn 1 */
// }
/******************************************************************************/
/* STM32F0xx Peripheral Interrupt Handlers */

2
bsp/stm32f0/drivers/stm32f0xx_it.h
View File

@ -41,7 +41,7 @@
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal.h"
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/

333
bsp/stm32f0/drivers/system_stm32f0xx.c Normal file
View File

@ -0,0 +1,333 @@
/**
******************************************************************************
* @file system_stm32f0xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f0xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to
* configure the system clock before to branch to main program.
*
* 3. This file configures the system clock as follows:
*=============================================================================
* Supported STM32F0xx device
*-----------------------------------------------------------------------------
* System Clock source | HSI
*-----------------------------------------------------------------------------
* SYSCLK(Hz) | 8000000
*-----------------------------------------------------------------------------
* HCLK(Hz) | 8000000
*-----------------------------------------------------------------------------
* AHB Prescaler | 1
*-----------------------------------------------------------------------------
* APB1 Prescaler | 1
*-----------------------------------------------------------------------------
*=============================================================================
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f0xx_system
* @{
*/
/** @addtogroup STM32F0xx_System_Private_Includes
* @{
*/
#include "stm32f0xx.h"
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
#if !defined (HSI48_VALUE)
#define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI48_VALUE */
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock there is no need to
call the 2 first functions listed above, since SystemCoreClock variable is
updated automatically.
*/
uint32_t SystemCoreClock = 8000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
* @param None
* @retval None
*/
void SystemInit(void)
{
/* Reset the RCC clock configuration to the default reset state ------------*/
/* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001U;
#if defined (STM32F051x8) || defined (STM32F058x8)
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */
RCC->CFGR &= (uint32_t)0xF8FFB80CU;
#else
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits */
RCC->CFGR &= (uint32_t)0x08FFB80CU;
#endif /* STM32F051x8 or STM32F058x8 */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
RCC->CFGR &= (uint32_t)0xFFC0FFFFU;
/* Reset PREDIV[3:0] bits */
RCC->CFGR2 &= (uint32_t)0xFFFFFFF0U;
#if defined (STM32F072xB) || defined (STM32F078xx)
/* Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits */
RCC->CFGR3 &= (uint32_t)0xFFFCFE2CU;
#elif defined (STM32F071xB)
/* Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */
RCC->CFGR3 &= (uint32_t)0xFFFFCEACU;
#elif defined (STM32F091xC) || defined (STM32F098xx)
/* Reset USART3SW[1:0], USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */
RCC->CFGR3 &= (uint32_t)0xFFF0FEACU;
#elif defined (STM32F030x6) || defined (STM32F030x8) || defined (STM32F031x6) || defined (STM32F038xx) || defined (STM32F030xC)
/* Reset USART1SW[1:0], I2C1SW and ADCSW bits */
RCC->CFGR3 &= (uint32_t)0xFFFFFEECU;
#elif defined (STM32F051x8) || defined (STM32F058xx)
/* Reset USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */
RCC->CFGR3 &= (uint32_t)0xFFFFFEACU;
#elif defined (STM32F042x6) || defined (STM32F048xx)
/* Reset USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits */
RCC->CFGR3 &= (uint32_t)0xFFFFFE2CU;
#elif defined (STM32F070x6) || defined (STM32F070xB)
/* Reset USART1SW[1:0], I2C1SW, USBSW and ADCSW bits */
RCC->CFGR3 &= (uint32_t)0xFFFFFE6CU;
/* Set default USB clock to PLLCLK, since there is no HSI48 */
RCC->CFGR3 |= (uint32_t)0x00000080U;
#else
#warning "No target selected"
#endif
/* Reset HSI14 bit */
RCC->CR2 &= (uint32_t)0xFFFFFFFEU;
/* Disable all interrupts */
RCC->CIR = 0x00000000U;
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f0xx_hal.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f0xx_hal.h file (default value
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
*
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
pllmull = ( pllmull >> 18) + 2;
predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
{
/* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */
SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull;
}
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV)
{
/* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */
SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull;
}
#endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */
else
{
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \
|| defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \
|| defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
/* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */
SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull;
#else
/* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */
SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
#endif /* STM32F042x6 || STM32F048xx || STM32F070x6 ||
STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB ||
STM32F091xC || STM32F098xx || STM32F030xC */
}
break;
default: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

409
bsp/stm32f0/project.uvprojx
View File

@ -331,9 +331,9 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls />
<Define>STM32F103xB, USE_HAL_DRIVER</Define>
<Define>USE_HAL_DRIVER, STM32F030x8, RT_USING_ARM_LIBC</Define>
<Undefine />
<IncludePath>drivers;applications;.;Libraries/CMSIS/Device/ST/STM32F1xx/Include;Libraries/STM32F1xx_HAL_Driver/Inc;Libraries/CMSIS/Include;../../include;../../libcpu/arm/cortex-m3;../../libcpu/arm/common;../../components/drivers/include;../../components/drivers/include;../../components/drivers/include;../../components/finsh</IncludePath>
<IncludePath>applications;.;drivers;Libraries\CMSIS\Device\ST\STM32F0xx\Include;Libraries\STM32F0xx_HAL_Driver\Inc;Libraries\CMSIS\Include;..\..\include;..\..\libcpu\arm\cortex-m0;..\..\libcpu\arm\common;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\libc\compilers\armlibc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -367,51 +367,58 @@
<ScatterFile />
<IncludeLibs />
<IncludeLibsPath />
<Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab)</Misc>
<Misc> --keep *.o(.rti_fn.*) </Misc>
<LinkerInputFile />
<DisabledWarnings />
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Applications</GroupName>
<Files>
<File>
<FileName>led.c</FileName>
<FileType>1</FileType>
<FilePath>applications\led.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>applications\main.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers</GroupName>
<Files>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>drivers/board.c</FilePath>
<FilePath>drivers\board.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_it.c</FileName>
<FileName>stm32f0xx_it.c</FileName>
<FileType>1</FileType>
<FilePath>drivers/stm32f1xx_it.c</FilePath>
<FilePath>drivers\stm32f0xx_it.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>drv_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>drivers/drv_gpio.c</FilePath>
<FilePath>drivers\drv_gpio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>drv_usart.c</FileName>
<FileType>1</FileType>
<FilePath>drivers/drv_usart.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Applications</GroupName>
<Files>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>applications/main.c</FilePath>
<FilePath>drivers\drv_usart.c</FilePath>
</File>
</Files>
</Group>
@ -419,338 +426,142 @@
<GroupName>STM32_HAL</GroupName>
<Files>
<File>
<FileName>system_stm32f1xx.c</FileName>
<FileName>system_stm32f0xx.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c</FilePath>
<FilePath>Libraries\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_adc.c</FileName>
<FileName>stm32f0xx_hal_iwdg.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_iwdg.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_adc_ex.c</FileName>
<FileName>stm32f0xx_hal_tim.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_gpio.c</FileName>
<FileName>stm32f0xx_hal_tim_ex.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_gpio_ex.c</FileName>
<FileName>stm32f0xx_hal_uart.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_flash.c</FileName>
<FileName>stm32f0xx_hal_uart_ex.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_flash_ex.c</FileName>
<FileName>stm32f0xx_hal_wwdg.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_wwdg.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_dma.c</FileName>
<FileName>stm32f0xx_hal_rcc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_cortex.c</FileName>
<FileName>stm32f0xx_hal_rcc_ex.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_crc.c</FileName>
<FileName>stm32f0xx_hal.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_crc.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_i2c.c</FileName>
<FileName>stm32f0xx_hal_i2c.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_irda.c</FileName>
<FileName>stm32f0xx_hal_i2c_ex.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_irda.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_iwdg.c</FileName>
<FileName>stm32f0xx_hal_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_pwr.c</FileName>
<FileName>stm32f0xx_hal_dma.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_rcc.c</FileName>
<FileName>stm32f0xx_hal_cortex.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_rcc_ex.c</FileName>
<FileName>stm32f0xx_hal_pwr.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_rtc.c</FileName>
<FileName>stm32f0xx_hal_pwr_ex.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_rtc_ex.c</FileName>
<FileName>stm32f0xx_hal_flash.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_smartcard.c</FileName>
<FileName>stm32f0xx_hal_flash_ex.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_smartcard.c</FilePath>
<FilePath>Libraries\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_spi.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_spi_ex.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_tim.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_tim_ex.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_uart.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_usart.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_usart.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_wwdg.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_wwdg.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_adc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_adc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_crc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_crc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_dac.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dac.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_dma.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_exti.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_fsmc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_i2c.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_i2c.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_pwr.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_rcc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_rtc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rtc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_sdmmc.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_sdmmc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_spi.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_spi.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_tim.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_usart.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_usb.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_ll_utils.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_can.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_pcd.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f1xx_hal_pcd_ex.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>startup_stm32f103xb.s</FileName>
<FileName>startup_stm32f030x8.s</FileName>
<FileType>2</FileType>
<FilePath>Libraries/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xb.s</FilePath>
<FilePath>build\Libraries\Device\ST\STM32F0xx\Source\Templates\arm\startup_stm32f030x8.s</FilePath>
</File>
</Files>
</Group>
@ -760,143 +571,143 @@
<File>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/clock.c</FilePath>
<FilePath>..\..\src\clock.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/components.c</FilePath>
<FilePath>..\..\src\components.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/device.c</FilePath>
<FilePath>..\..\src\device.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/idle.c</FilePath>
<FilePath>..\..\src\idle.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/ipc.c</FilePath>
<FilePath>..\..\src\ipc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/irq.c</FilePath>
<FilePath>..\..\src\irq.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/kservice.c</FilePath>
<FilePath>..\..\src\kservice.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/mem.c</FilePath>
<FilePath>..\..\src\mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>memheap.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/memheap.c</FilePath>
<FilePath>..\..\src\memheap.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/mempool.c</FilePath>
<FilePath>..\..\src\mempool.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/object.c</FilePath>
<FilePath>..\..\src\object.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/scheduler.c</FilePath>
<FilePath>..\..\src\scheduler.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>signal.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/signal.c</FilePath>
<FilePath>..\..\src\signal.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/thread.c</FilePath>
<FilePath>..\..\src\thread.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/timer.c</FilePath>
<FilePath>..\..\src\timer.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>CORTEX-M3</GroupName>
<GroupName>CORTEX-M0</GroupName>
<Files>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
<FilePath>../../libcpu/arm/cortex-m3/cpuport.c</FilePath>
<FilePath>..\..\libcpu\arm\cortex-m0\cpuport.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>../../libcpu/arm/cortex-m3/context_rvds.S</FilePath>
<FilePath>..\..\libcpu\arm\cortex-m0\context_rvds.S</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
<FilePath>../../libcpu/arm/common/backtrace.c</FilePath>
<FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>../../libcpu/arm/common/div0.c</FilePath>
<FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>../../libcpu/arm/common/showmem.c</FilePath>
<FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
</Group>
@ -906,101 +717,87 @@
<File>
<FileName>pin.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/misc/pin.c</FilePath>
<FilePath>..\..\components\drivers\misc\pin.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/serial/serial.c</FilePath>
<FilePath>..\..\components\drivers\serial\serial.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>completion.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/completion.c</FilePath>
<FilePath>..\..\components\drivers\src\completion.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dataqueue.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/dataqueue.c</FilePath>
<FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pipe.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/pipe.c</FilePath>
<FilePath>..\..\components\drivers\src\pipe.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/ringbuffer.c</FilePath>
<FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>waitqueue.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/waitqueue.c</FilePath>
<FilePath>..\..\components\drivers\src\waitqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/workqueue.c</FilePath>
<FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>finsh</GroupName>
<GroupName>libc</GroupName>
<Files>
<File>
<FileName>shell.c</FileName>
<FileName>libc.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/shell.c</FilePath>
<FilePath>..\..\components\libc\compilers\armlibc\libc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>symbol.c</FileName>
<FileName>mem_std.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/symbol.c</FilePath>
<FilePath>..\..\components\libc\compilers\armlibc\mem_std.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileName>stubs.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/cmd.c</FilePath>
<FilePath>..\..\components\libc\compilers\armlibc\stubs.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh.c</FileName>
<FileName>time.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/msh.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh_cmd.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/msh_cmd.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh_file.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/msh_file.c</FilePath>
<FilePath>..\..\components\libc\compilers\armlibc\time.c</FilePath>
</File>
</Files>
</Group>

6
bsp/stm32f0/rtconfig.h
View File

@ -35,6 +35,9 @@
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart2"
/* RT-Thread Components */
@ -121,7 +124,8 @@
/* example package: hello */
#define STM32F030RB
#define STM32F030R8
#define RT_HSE_VALUE 8000000
#define RT_USING_UART2
#endif

22
bsp/stm32f0/rtconfig.py
View File

@ -3,31 +3,30 @@ import os
# toolchains options
ARCH='arm'
CPU='cortex-m0'
CROSS_TOOL='keil'
CROSS_TOOL='gcc'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
# cross_tool provides the cross compiler
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = '/usr/local/gcc-arm-none-eabi-5_4-2016q3/bin/'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = 'C:/Keil'
EXEC_PATH = 'C:/Keilv5'
elif CROSS_TOOL == 'iar':
print('================ERROR============================')
print('Not support iar yet!')
print('=================================================')
exit(0)
PLATFORM = 'iar'
EXEC_PATH = 'C:/Program Files/IAR Systems/Embedded Workbench 6.0 Evaluation'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
#BUILD = 'debug'
BUILD = 'release'
STM32_TYPE = 'STM32F0XX'
BUILD = 'debug'
# BUILD = 'release'
if PLATFORM == 'gcc':
# toolchains
@ -42,7 +41,7 @@ if PLATFORM == 'gcc':
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
CFLAGS = DEVICE
CFLAGS = DEVICE
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-stm32.map,-cref,-u,Reset_Handler -T stm32_rom.ld'
@ -70,6 +69,7 @@ elif PLATFORM == 'armcc':
AFLAGS = DEVICE
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter stm32_rom.sct'
CFLAGS += ' --c99'
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
@ -91,7 +91,7 @@ elif PLATFORM == 'iar':
LINK = 'ilinkarm'
TARGET_EXT = 'out'
DEVICE = ' -D USE_STDPERIPH_DRIVER' + ' -D STM32F10X_HD'
DEVICE = ' -D USE_HAL_DRIVER'
CFLAGS = DEVICE
CFLAGS += ' --diag_suppress Pa050'