163 lines
6.3 KiB
C
163 lines
6.3 KiB
C
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/*
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* @brief LPC5410X Input Mux Registers and Driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2014
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __INMUX_5410X_H_
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#define __INMUX_5410X_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup INMUX_5410X CHIP: LPC5410X Input Mux Registers and Driver
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* @ingroup CHIP_5410X_DRIVERS
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* @{
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*/
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/**
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* @brief LPC5410X Input Mux Register Block Structure
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*/
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typedef struct { /*!< INMUX Structure */
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__IO uint32_t RESERVED0[6];
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__I uint32_t RESERVED1[42];
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__IO uint32_t PINTSEL[8]; /*!< Pin interrupt select registers */
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__IO uint32_t DMA_ITRIG_INMUX[22]; /*!< Input mux register for DMA trigger inputs */
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__I uint32_t RESERVED2[2];
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__IO uint32_t DMA_OTRIG_INMUX[4]; /*!< Input mux register for DMA trigger inputs */
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__I uint32_t RESERVED3[4];
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__IO uint32_t FREQMEAS_REF; /*!< Clock selection for frequency measurement ref clock */
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__IO uint32_t FREQMEAS_TARGET; /*!< Clock selection for frequency measurement target clock */
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} LPC_INMUX_T;
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/**
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* @brief GPIO Pin Interrupt Pin Select (sets PINTSEL register)
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* @param pintSel : GPIO PINTSEL interrupt, should be: 0 to 7
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* @param portNum : GPIO port number interrupt, should be: 0 to 1
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* @param pinNum : GPIO pin number Interrupt, should be: 0 to 31
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* @return Nothing
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*/
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STATIC INLINE void Chip_INMUX_PinIntSel(uint8_t pintSel, uint8_t portNum, uint8_t pinNum)
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{
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LPC_INMUX->PINTSEL[pintSel] = (portNum * 32) + pinNum;
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}
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/* DMA triggers that can mapped to DMA channels */
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typedef enum {
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DMATRIG_ADC0_SEQA_IRQ = 0, /*!< ADC0 sequencer A interrupt as trigger */
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DMATRIG_ADC0_SEQB_IRQ, /*!< ADC0 sequencer B interrupt as trigger */
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DMATRIG_SCT0_DMA0, /*!< SCT 0, DMA 0 as trigger */
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DMATRIG_SCT0_DMA1, /*!< SCT 1, DMA 1 as trigger */
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DMATRIG_TIMER0_MATCH0, /*!< Timer 0, match 0 trigger */
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DMATRIG_TIMER0_MATCH1, /*!< Timer 0, match 1 trigger */
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DMATRIG_TIMER1_MATCH0, /*!< Timer 1, match 0 trigger */
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DMATRIG_TIMER1_MATCH1, /*!< Timer 1, match 1 trigger */
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DMATRIG_TIMER2_MATCH0, /*!< Timer 2, match 0 trigger */
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DMATRIG_TIMER2_MATCH1, /*!< Timer 2, match 1 trigger */
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DMATRIG_TIMER3_MATCH0, /*!< Timer 3, match 0 trigger */
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DMATRIG_TIMER3_MATCH1, /*!< Timer 3, match 1 trigger */
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DMATRIG_TIMER4_MATCH0, /*!< Timer 4, match 0 trigger */
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DMATRIG_TIMER4_MATCH1, /*!< Timer 4, match 1 trigger */
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DMATRIG_PININT0, /*!< Pin interrupt 0 trigger */
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DMATRIG_PININT1, /*!< Pin interrupt 1 trigger */
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DMATRIG_PININT2, /*!< Pin interrupt 2 trigger */
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DMATRIG_PININT3, /*!< Pin interrupt 3 trigger */
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DMATRIG_OUTMUX0, /*!< DMA trigger tied to this source, Select with Chip_INMUX_SetDMAOutMux */
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DMATRIG_OUTMUX1, /*!< DMA trigger tied to this source, Select with Chip_INMUX_SetDMAOutMux */
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DMATRIG_OUTMUX2, /*!< DMA trigger tied to this source, Select with Chip_INMUX_SetDMAOutMux */
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DMATRIG_OUTMUX3 /*!< DMA trigger tied to this source, Select with Chip_INMUX_SetDMAOutMux */
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} DMA_TRIGSRC_T;
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/**
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* @brief Select a trigger source for a DMA channel
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* @param ch : DMA channel number
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* @param trig : Trigger source for the DMA channel
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* @return Nothing
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*/
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STATIC INLINE void Chip_INMUX_SetDMATrigger(uint8_t ch, DMA_TRIGSRC_T trig)
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{
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LPC_INMUX->DMA_ITRIG_INMUX[ch] = (uint32_t) trig;
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}
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/**
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* @brief Selects a DMA trigger source for the DMATRIG_OUTMUXn IDs
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* @param index : Select 0 to 3 to sets the source for DMATRIG_OUTMUX0 to DMATRIG_OUTMUX3
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* @param dmaCh : DMA channel to select for DMATRIG_OUTMUXn source
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* @return Nothing
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* @note This function sets the DMA trigger (out) source used with the DMATRIG_OUTMUXn
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* trigger source.
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*/
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STATIC INLINE void Chip_INMUX_SetDMAOutMux(uint8_t index, uint8_t dmaCh)
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{
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LPC_INMUX->DMA_OTRIG_INMUX[index] = (uint32_t) dmaCh;
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}
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/* Freqeuency measure reference and target clock sources */
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typedef enum {
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FREQMSR_CLKIN = 0, /*!< CLKIN pin */
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FREQMSR_IRC, /*!< Internal RC (IRC) oscillator */
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FREQMSR_WDOSC, /*!< Watchdog oscillator */
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FREQMSR_32KHZOSC, /*!< 32KHz (RTC) oscillator rate */
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FREQ_MEAS_MAIN_CLK, /*!< main system clock */
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FREQMSR_PIO0_4, /*!< External pin PIO0_4 as input rate */
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FREQMSR_PIO0_20, /*!< External pin PIO0_20 as input rate */
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FREQMSR_PIO0_24, /*!< External pin PIO0_24 as input rate */
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FREQMSR_PIO1_4 /*!< External pin PIO1_4 as input rate */
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} FREQMSR_SRC_T;
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/**
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* @brief Selects a reference clock used with the frequency measure function
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* @param ref : Frequency measure function reference clock
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* @return Nothing
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*/
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STATIC INLINE void Chip_INMUX_SetFreqMeasRefClock(FREQMSR_SRC_T ref)
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{
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LPC_INMUX->FREQMEAS_REF = (uint32_t) ref;
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}
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/**
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* @brief Selects a target clock used with the frequency measure function
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* @param targ : Frequency measure function reference clock
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* @return Nothing
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*/
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STATIC INLINE void Chip_INMUX_SetFreqMeasTargClock(FREQMSR_SRC_T targ)
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{
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LPC_INMUX->FREQMEAS_TARGET = (uint32_t) targ;
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}
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INMUX_5410X_H_ */
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