28 lines
1.0 KiB
C
28 lines
1.0 KiB
C
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#define write_reg(a,v) (*(volatile unsigned int *)(a) = (v))
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/* Processor Reset */
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#define AT91_RSTC_PROCRST (1 << 0)
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#define AT91_RSTC_PERRST (1 << 2)
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#define AT91_RSTC_KEY (0xa5 << 24)
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#define AT91_MATRIX_BASE (0XFFFFEE00)
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/* Master Remap Control Register */
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#define AT91_MATRIX_MRCR (AT91_MATRIX_BASE + 0x100)
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/* Remap Command for AHB Master 0 (ARM926EJ-S InSTRuction Master) */
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#define AT91_MATRIX_RCB0 (1 << 0)
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/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
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#define AT91_MATRIX_RCB1 (1 << 1)
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#define AT91_AIC_BASE (0XFFFFF000)
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/* Interrupt DisaBLe Command Register */
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#define AT91_AIC_IDCR (0x124)
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/* Interrupt Clear Command Register */
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#define AT91_AIC_ICCR (0x128)
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void rt_low_level_init(void)
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{
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// Mask all IRQs by clearing all bits in the INTMRS
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write_reg(AT91_AIC_BASE + AT91_AIC_IDCR, 0xFFFFFFFF);
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write_reg(AT91_AIC_BASE + AT91_AIC_ICCR, 0xFFFFFFFF);
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// Remap internal ram to 0x00000000 Address
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write_reg(AT91_MATRIX_MRCR, AT91_MATRIX_RCB0 | AT91_MATRIX_RCB1);
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}
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