79 lines
2.6 KiB
C
79 lines
2.6 KiB
C
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/** @file reg_pmm.h
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* @brief PMM Register Layer Header File
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* @date 23.May.2013
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* @version 03.05.01
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*
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* This file contains:
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* - Definitions
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* - Types
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* .
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* which are relevant for the PMM driver.
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*/
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/* (c) Texas Instruments 2009-2013, All rights reserved. */
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#ifndef __REG_PMM_H__
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#define __REG_PMM_H__
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#include "sys_common.h"
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/* USER CODE BEGIN (0) */
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/* USER CODE END */
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/* Pmm Register Frame Definition */
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/** @struct pmmBase
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* @brief Pmm Register Frame Definition
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*
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* This type is used to access the Pmm Registers.
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*/
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/** @typedef pmmBase_t
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* @brief Pmm Register Frame Type Definition
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*
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* This type is used to access the Pmm Registers.
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*/
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typedef volatile struct pmmBase
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{
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uint32 LOGICPDPWRCTRL0; /**< 0x0000: Logic Power Domain Control Register 0 */
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uint32 rsvd1[3U]; /**< 0x0004: Reserved*/
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uint32 MEMPDPWRCTRL0; /**< 0x0010: Memory Power Domain Control Register 0 */
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uint32 rsvd2[3U]; /**< 0x0014: Reserved*/
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uint32 PDCLKDISREG; /**< 0x0020: Power Domain Clock Disable Register */
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uint32 PDCLKDISSETREG; /**< 0x0024: Power Domain Clock Disable Set Register */
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uint32 PDCLKDISCLRREG; /**< 0x0028: Power Domain Clock Disable Clear Register */
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uint32 rsvd3[5U]; /**< 0x002C: Reserved */
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uint32 LOGICPDPWRSTAT[4U]; /**< 0x0040, 0x0044, 0x0048, 0x004C: Logic Power Domain Power Status Register
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- 0: PD2
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- 1: PD3
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- 2: PD4
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- 3: PD5 */
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uint32 rsvd4[12U]; /**< 0x0050: Reserved*/
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uint32 MEMPDPWRSTAT[3U]; /**< 0x0080, 0x0084, 0x0088: Memory Power Domain Power Status Register
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- 0: RAM_PD1
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- 1: RAM_PD2
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- 2: RAM_PD3 */
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uint32 rsvd5[5U]; /**< 0x008C: Reserved */
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uint32 GLOBALCTRL1; /**< 0x00A0: Global Control Register 1 */
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uint32 rsvd6; /**< 0x00A4: Reserved */
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uint32 GLOBALSTAT; /**< 0x00A8: Global Status Register */
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uint32 PRCKEYREG; /**< 0x00AC: PSCON Diagnostic Compare Key Register */
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uint32 LPDDCSTAT1; /**< 0x00B0: LogicPD PSCON Diagnostic Compare Status Register 1 */
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uint32 LPDDCSTAT2; /**< 0x00B4: LogicPD PSCON Diagnostic Compare Status Register 2 */
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uint32 MPDDCSTAT1; /**< 0x00B8: Memory PD PSCON Diagnostic Compare Status Register 1 */
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uint32 MPDDCSTAT2; /**< 0x00BC: Memory PD PSCON Diagnostic Compare Status Register 2 */
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uint32 ISODIAGSTAT; /**< 0x00C0: Isolation Diagnostic Status Register */
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}pmmBase_t;
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/** @def pmmREG
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* @brief Pmm Register Frame Pointer
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*
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* This pointer is used by the Pmm driver to access the Pmm registers.
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*/
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#define pmmREG ((pmmBase_t *)0xFFFF0000U)
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/* USER CODE BEGIN (1) */
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/* USER CODE END */
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#endif
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