355 lines
12 KiB
C
355 lines
12 KiB
C
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/*
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* File : usart.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2017-08-17 Tanek first implementation
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*/
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#include <rtthread.h>
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#include "stm32f4xx_hal.h"
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#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
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#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
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#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
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#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
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#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
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#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
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#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
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#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
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#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
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#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
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#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
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#define BUFFER_SIZE ((uint32_t)0x0100)
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#define WRITE_READ_ADDR ((uint32_t)0x0800)
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#define REFRESH_COUNT ((uint32_t)0x0569) /* SDRAM refresh counter (90MHz SDRAM clock) */
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static FMC_SDRAM_CommandTypeDef command;
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static SDRAM_HandleTypeDef hsdram1;
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static FMC_SDRAM_TimingTypeDef SdramTiming;
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static void HAL_FMC_MspInit(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct;
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/* Peripheral clock enable */
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__HAL_RCC_FMC_CLK_ENABLE();
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/* GPIO Ports Clock Enable */
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_GPIOE_CLK_ENABLE();
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__HAL_RCC_GPIOF_CLK_ENABLE();
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__HAL_RCC_GPIOG_CLK_ENABLE();
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__HAL_RCC_GPIOH_CLK_ENABLE();
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__HAL_RCC_GPIOI_CLK_ENABLE();
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/** FMC GPIO Configuration
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PI9 ------> FMC_D30
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PI10 ------> FMC_D31
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PF0 ------> FMC_A0
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PF1 ------> FMC_A1
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PF2 ------> FMC_A2
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PF3 ------> FMC_A3
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PF4 ------> FMC_A4
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PF5 ------> FMC_A5
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PH2 ------> FMC_SDCKE0
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PH3 ------> FMC_SDNE0
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PH5 ------> FMC_SDNWE
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PF11 ------> FMC_SDNRAS
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PF12 ------> FMC_A6
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PF13 ------> FMC_A7
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PF14 ------> FMC_A8
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PF15 ------> FMC_A9
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PG0 ------> FMC_A10
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PG1 ------> FMC_A11
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PE7 ------> FMC_D4
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PE8 ------> FMC_D5
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PE9 ------> FMC_D6
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PE10 ------> FMC_D7
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PE11 ------> FMC_D8
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PE12 ------> FMC_D9
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PE13 ------> FMC_D10
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PE14 ------> FMC_D11
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PE15 ------> FMC_D12
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PH8 ------> FMC_D16
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PH9 ------> FMC_D17
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PH10 ------> FMC_D18
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PH11 ------> FMC_D19
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PH12 ------> FMC_D20
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PD8 ------> FMC_D13
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PD9 ------> FMC_D14
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PD10 ------> FMC_D15
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PD14 ------> FMC_D0
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PD15 ------> FMC_D1
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PG4 ------> FMC_BA0
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PG5 ------> FMC_BA1
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PG8 ------> FMC_SDCLK
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PH13 ------> FMC_D21
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PH14 ------> FMC_D22
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PH15 ------> FMC_D23
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PI0 ------> FMC_D24
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PI1 ------> FMC_D25
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PI2 ------> FMC_D26
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PI3 ------> FMC_D27
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PD0 ------> FMC_D2
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PD1 ------> FMC_D3
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PG15 ------> FMC_SDNCAS
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PE0 ------> FMC_NBL0
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PE1 ------> FMC_NBL1
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PI4 ------> FMC_NBL2
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PI5 ------> FMC_NBL3
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PI6 ------> FMC_D28
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PI7 ------> FMC_D29
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*/
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GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1
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|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
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|GPIO_PIN_6|GPIO_PIN_7;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
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|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12
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|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_5|GPIO_PIN_8
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|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12
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|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5
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|GPIO_PIN_8|GPIO_PIN_15;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
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|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
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|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
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|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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}
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void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){
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HAL_FMC_MspInit();
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}
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static void HAL_FMC_MspDeInit(void)
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{
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/* Peripheral clock enable */
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__HAL_RCC_FMC_CLK_DISABLE();
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/** FMC GPIO Configuration
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PI9 ------> FMC_D30
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PI10 ------> FMC_D31
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PF0 ------> FMC_A0
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PF1 ------> FMC_A1
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PF2 ------> FMC_A2
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PF3 ------> FMC_A3
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PF4 ------> FMC_A4
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PF5 ------> FMC_A5
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PH2 ------> FMC_SDCKE0
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PH3 ------> FMC_SDNE0
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PH5 ------> FMC_SDNWE
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PF11 ------> FMC_SDNRAS
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PF12 ------> FMC_A6
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PF13 ------> FMC_A7
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PF14 ------> FMC_A8
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PF15 ------> FMC_A9
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PG0 ------> FMC_A10
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PG1 ------> FMC_A11
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PE7 ------> FMC_D4
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PE8 ------> FMC_D5
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PE9 ------> FMC_D6
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PE10 ------> FMC_D7
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PE11 ------> FMC_D8
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PE12 ------> FMC_D9
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PE13 ------> FMC_D10
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PE14 ------> FMC_D11
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PE15 ------> FMC_D12
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PH8 ------> FMC_D16
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PH9 ------> FMC_D17
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PH10 ------> FMC_D18
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PH11 ------> FMC_D19
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PH12 ------> FMC_D20
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PD8 ------> FMC_D13
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PD9 ------> FMC_D14
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PD10 ------> FMC_D15
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PD14 ------> FMC_D0
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PD15 ------> FMC_D1
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PG4 ------> FMC_BA0
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PG5 ------> FMC_BA1
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PG8 ------> FMC_SDCLK
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PH13 ------> FMC_D21
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PH14 ------> FMC_D22
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PH15 ------> FMC_D23
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PI0 ------> FMC_D24
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PI1 ------> FMC_D25
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PI2 ------> FMC_D26
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PI3 ------> FMC_D27
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PD0 ------> FMC_D2
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PD1 ------> FMC_D3
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PG15 ------> FMC_SDNCAS
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PE0 ------> FMC_NBL0
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PE1 ------> FMC_NBL1
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PI4 ------> FMC_NBL2
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PI5 ------> FMC_NBL3
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PI6 ------> FMC_D28
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PI7 ------> FMC_D29
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*/
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HAL_GPIO_DeInit(GPIOI, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1
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|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
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|GPIO_PIN_6|GPIO_PIN_7);
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HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
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|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12
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|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
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HAL_GPIO_DeInit(GPIOH, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_5|GPIO_PIN_8
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|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12
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|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
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HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5
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|GPIO_PIN_8|GPIO_PIN_15);
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HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
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|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
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|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
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HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
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|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
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}
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void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram)
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{
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HAL_FMC_MspDeInit();
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}
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/**
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* @brief Perform the SDRAM exernal memory inialization sequence
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* @param hsdram: SDRAM handle
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* @param Command: Pointer to SDRAM command structure
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* @retval None
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*/
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static void SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command)
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{
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__IO uint32_t tmpmrd =0;
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/* Step 3: Configure a clock configuration enable command */
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Command->CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
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Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
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Command->AutoRefreshNumber = 1;
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Command->ModeRegisterDefinition = 0;
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/* Send the command */
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HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
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/* Step 4: Insert 100 ms delay */
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//HAL_Delay(100);
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for (tmpmrd = 0; tmpmrd < 0xfffff; tmpmrd ++)
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;
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/* Step 5: Configure a PALL (precharge all) command */
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Command->CommandMode = FMC_SDRAM_CMD_PALL;
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Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
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Command->AutoRefreshNumber = 1;
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Command->ModeRegisterDefinition = 0;
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/* Send the command */
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HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
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/* Step 6 : Configure a Auto-Refresh command */
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Command->CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
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Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
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Command->AutoRefreshNumber = 8;
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Command->ModeRegisterDefinition = 0;
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/* Send the command */
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HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
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/* Step 7: Program the external memory mode register */
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tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |
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SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |
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SDRAM_MODEREG_CAS_LATENCY_3 |
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SDRAM_MODEREG_OPERATING_MODE_STANDARD |
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SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
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Command->CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
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Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
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Command->AutoRefreshNumber = 1;
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Command->ModeRegisterDefinition = tmpmrd;
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/* Send the command */
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HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
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/* Step 8: Set the refresh rate counter */
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/* (15.62 us x Freq) - 20 */
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/* Set the device refresh counter */
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HAL_SDRAM_ProgramRefreshRate(hsdram, REFRESH_COUNT);
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}
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int stm32_hw_0_sdram_init(void)
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{
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/** Perform the SDRAM1 memory initialization sequence
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*/
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hsdram1.Instance = FMC_SDRAM_DEVICE;
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|
/* hsdram1.Init */
|
||
|
|
hsdram1.Init.SDBank = FMC_SDRAM_BANK1;
|
||
|
|
hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
|
||
|
|
hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
|
||
|
|
hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_32;
|
||
|
|
hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
|
||
|
|
hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
|
||
|
|
hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
|
||
|
|
hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
|
||
|
|
hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
|
||
|
|
hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
|
||
|
|
/* SdramTiming */
|
||
|
|
SdramTiming.LoadToActiveDelay = 2;
|
||
|
|
SdramTiming.ExitSelfRefreshDelay = 7;
|
||
|
|
SdramTiming.SelfRefreshTime = 2;
|
||
|
|
SdramTiming.RowCycleDelay = 4;
|
||
|
|
SdramTiming.WriteRecoveryTime = 2;
|
||
|
|
SdramTiming.RPDelay = 2;
|
||
|
|
SdramTiming.RCDDelay = 2;
|
||
|
|
|
||
|
|
if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
|
||
|
|
{
|
||
|
|
RT_ASSERT(RT_NULL);
|
||
|
|
}
|
||
|
|
|
||
|
|
SDRAM_Initialization_Sequence(&hsdram1, &command);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
INIT_BOARD_EXPORT(stm32_hw_0_sdram_init);
|