2011-07-01 22:13:16 +08:00
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/*
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* File : start_gcc.S
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2011, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2011-07-01 lgnq first version
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*/
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2011-03-02 21:05:26 +08:00
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.section .bss.init
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.equ Stack_Size, 0x00000200
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.space Stack_Size
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Initial_spTop:
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.syntax unified
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.cpu cortex-m3
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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// .equ Initial_spTop, 0x20000200
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.equ BootRAM, 0xF1E0F85F
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/**
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* @brief This is the code that gets called when the processor first
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* starts execution following a reset event. Only the absolutely
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* necessary set is performed, after which the application
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* supplied main() routine is called.
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* @param None
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* @retval : None
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*/
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* restore original stack pointer */
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LDR r0, =Initial_spTop
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MSR msp, r0
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/* Copy the data segment initializers from flash to SRAM */
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movs r1, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r3, =_sidata
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ldr r3, [r3, r1]
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str r3, [r0, r1]
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adds r1, r1, #4
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LoopCopyDataInit:
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ldr r0, =_sdata
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ldr r3, =_edata
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adds r2, r0, r1
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cmp r2, r3
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bcc CopyDataInit
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ldr r2, =_sbss
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b LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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movs r3, #0
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str r3, [r2], #4
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LoopFillZerobss:
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ldr r3, = _ebss
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cmp r2, r3
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bcc FillZerobss
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/* Call the application's entry point.*/
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bl main
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bx lr
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.size Reset_Handler, .-Reset_Handler
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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*
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* @param None
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* @retval : None
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*/
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.section .text.Default_Handler,"ax",%progbits
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M3. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word Initial_spTop
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.word Reset_Handler
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.word NMI_Handler
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.word rt_hw_hard_fault
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word rt_hw_pend_sv
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.word rt_hw_timer_handler
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2011-07-01 22:13:16 +08:00
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.word CSV_IRQHandler
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.word SWDT_IRQHandler
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.word LVD_IRQHandler
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.word WFG_IRQHandler
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.word EXINT0_7_IRQHandler
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.word EXINT8_15_IRQHandler
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.word DTIM_QDU_IRQHandler
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.word MFS0RX_IRQHandler
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.word MFS0TX_IRQHandler
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.word MFS1RX_IRQHandler
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.word MFS1TX_IRQHandler
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#ifdef RT_USING_UART2
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.word MFS2RX_IRQHandler ; MultiFunction Serial ch.2
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#else
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.word NULL_IRQHandler
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#endif
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.word MFS2TX_IRQHandler
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.word MFS3RX_IRQHandler
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.word MFS3TX_IRQHandler
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.word MFS4RX_IRQHandler
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.word MFS4TX_IRQHandler
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.word MFS5RX_IRQHandler
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.word MFS5TX_IRQHandler
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.word MFS6RX_IRQHandler
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.word MFS6TX_IRQHandler
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.word MFS7RX_IRQHandler
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.word MFS7TX_IRQHandler
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.word PPG_IRQHandler
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.word OSC_PLL_WC_IRQHandler
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.word ADC0_IRQHandler
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.word ADC1_IRQHandler
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.word ADC2_IRQHandler
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.word FRTIM_IRQHandler
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.word INCAP_IRQHandler
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.word OUTCOMP_IRQHandler
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.word BTIM_IRQHandler
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.word CAN0_IRQHandler
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.word CAN1_IRQHandler
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.word USBF_IRQHandler
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.word USBF_USBH_IRQHandler
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.word RESERVED_1_IRQHandler
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.word RESERVED_2_IRQHandler
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.word DMAC0_IRQHandler
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.word DMAC1_IRQHandler
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.word DMAC2_IRQHandler
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.word DMAC3_IRQHandler
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.word DMAC4_IRQHandler
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.word DMAC5_IRQHandler
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.word DMAC6_IRQHandler
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.word DMAC7_IRQHandler
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.word RESERVED_3_IRQHandler
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.word RESERVED_4_IRQHandler
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2011-03-02 21:05:26 +08:00
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*
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*******************************************************************************/
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.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler,Default_Handler
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.weak BusFault_Handler
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.thumb_set BusFault_Handler,Default_Handler
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.weak UsageFault_Handler
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.thumb_set UsageFault_Handler,Default_Handler
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.weak SVC_Handler
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.thumb_set SVC_Handler,Default_Handler
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.weak DebugMon_Handler
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.thumb_set DebugMon_Handler,Default_Handler
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2011-07-01 22:13:16 +08:00
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.weak CSV_IRQHandler
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.thumb_set CSV_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak SWDT_IRQHandler
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.thumb_set SWDT_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak LVD_IRQHandler
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.thumb_set LVD_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak WFG_IRQHandler
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.thumb_set WFG_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak EXINT0_7_IRQHandler
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.thumb_set EXINT0_7_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak EXINT8_15_IRQHandler
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.thumb_set EXINT8_15_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak DTIM_QDU_IRQHandler
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.thumb_set DTIM_QDU_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS0RX_IRQHandler
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.thumb_set MFS0RX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS0TX_IRQHandler
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.thumb_set MFS0TX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS1RX_IRQHandler
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.thumb_set MFS1RX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS1TX_IRQHandler
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.thumb_set MFS1TX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak NULL_IRQHandler
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.thumb_set NULL_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS2TX_IRQHandler
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.thumb_set MFS2TX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS3RX_IRQHandler
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.thumb_set MFS3RX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS3TX_IRQHandler
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.thumb_set MFS3TX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS4RX_IRQHandler
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.thumb_set MFS4RX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS4TX_IRQHandler
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.thumb_set MFS4TX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS5RX_IRQHandler
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.thumb_set MFS5RX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS5TX_IRQHandler
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.thumb_set MFS5TX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS6RX_IRQHandler
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.thumb_set MFS6RX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS6TX_IRQHandler
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.thumb_set MFS6TX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS7RX_IRQHandler
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.thumb_set MFS7RX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak MFS7TX_IRQHandler
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.thumb_set MFS7TX_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak PPG_IRQHandler
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.thumb_set PPG_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak OSC_PLL_WC_IRQHandler
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.thumb_set OSC_PLL_WC_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak ADC0_IRQHandler
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.thumb_set ADC0_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak ADC1_IRQHandler
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.thumb_set ADC1_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak ADC2_IRQHandler
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.thumb_set ADC2_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak FRTIM_IRQHandler
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.thumb_set FRTIM_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak INCAP_IRQHandler
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.thumb_set INCAP_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak OUTCOMP_IRQHandler
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.thumb_set OUTCOMP_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak BTIM_IRQHandler
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.thumb_set BTIM_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak CAN0_IRQHandler
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.thumb_set CAN0_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak CAN1_IRQHandler
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.thumb_set CAN1_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak USBF_IRQHandler
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.thumb_set USBF_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak USBF_USBH_IRQHandler
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.thumb_set USBF_USBH_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak RESERVED_1_IRQHandler
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.thumb_set RESERVED_1_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak RESERVED_2_IRQHandler
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.thumb_set RESERVED_2_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak DMAC0_IRQHandler
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.thumb_set DMAC0_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak DMAC1_IRQHandler
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.thumb_set DMAC1_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak DMAC2_IRQHandler
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.thumb_set DMAC2_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak DMAC3_IRQHandler
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.thumb_set DMAC3_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak DMAC4_IRQHandler
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.thumb_set DMAC4_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak DMAC5_IRQHandler
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.thumb_set DMAC5_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak DMAC6_IRQHandler
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.thumb_set DMAC6_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak DMAC7_IRQHandler
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.thumb_set DMAC7_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak RESERVED_3_IRQHandler
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.thumb_set RESERVED_3_IRQHandler,Default_Handler
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2011-03-02 21:05:26 +08:00
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2011-07-01 22:13:16 +08:00
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.weak RESERVED_4_IRQHandler
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.thumb_set RESERVED_4_IRQHandler,Default_Handler
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