577 lines
20 KiB
C
577 lines
20 KiB
C
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FSL_PDB_H_
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#define _FSL_PDB_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup pdb
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief PDB driver version 2.0.1. */
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#define FSL_PDB_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
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/*@}*/
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/*!
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* @brief PDB flags.
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*/
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enum _pdb_status_flags
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{
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kPDB_LoadOKFlag = PDB_SC_LDOK_MASK, /*!< This flag is automatically cleared when the values in buffers are
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loaded into the internal registers after the LDOK bit is set or the
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PDBEN is cleared. */
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kPDB_DelayEventFlag = PDB_SC_PDBIF_MASK, /*!< PDB timer delay event flag. */
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};
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/*!
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* @brief PDB ADC PreTrigger channel flags.
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*/
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enum _pdb_adc_pretrigger_flags
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{
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/* PDB PreTrigger channel match flags. */
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kPDB_ADCPreTriggerChannel0Flag = PDB_S_CF(1U << 0), /*!< Pre-trigger 0 flag. */
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kPDB_ADCPreTriggerChannel1Flag = PDB_S_CF(1U << 1), /*!< Pre-trigger 1 flag. */
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#if (PDB_DLY_COUNT2 > 2)
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kPDB_ADCPreTriggerChannel2Flag = PDB_S_CF(1U << 2), /*!< Pre-trigger 2 flag. */
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kPDB_ADCPreTriggerChannel3Flag = PDB_S_CF(1U << 3), /*!< Pre-trigger 3 flag. */
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#endif /* PDB_DLY_COUNT2 > 2 */
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#if (PDB_DLY_COUNT2 > 4)
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kPDB_ADCPreTriggerChannel4Flag = PDB_S_CF(1U << 4), /*!< Pre-trigger 4 flag. */
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kPDB_ADCPreTriggerChannel5Flag = PDB_S_CF(1U << 5), /*!< Pre-trigger 5 flag. */
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kPDB_ADCPreTriggerChannel6Flag = PDB_S_CF(1U << 6), /*!< Pre-trigger 6 flag. */
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kPDB_ADCPreTriggerChannel7Flag = PDB_S_CF(1U << 7), /*!< Pre-trigger 7 flag. */
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#endif /* PDB_DLY_COUNT2 > 4 */
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/* PDB PreTrigger channel error flags. */
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kPDB_ADCPreTriggerChannel0ErrorFlag = PDB_S_ERR(1U << 0), /*!< Pre-trigger 0 Error. */
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kPDB_ADCPreTriggerChannel1ErrorFlag = PDB_S_ERR(1U << 1), /*!< Pre-trigger 1 Error. */
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#if (PDB_DLY_COUNT2 > 2)
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kPDB_ADCPreTriggerChannel2ErrorFlag = PDB_S_ERR(1U << 2), /*!< Pre-trigger 2 Error. */
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kPDB_ADCPreTriggerChannel3ErrorFlag = PDB_S_ERR(1U << 3), /*!< Pre-trigger 3 Error. */
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#endif /* PDB_DLY_COUNT2 > 2 */
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#if (PDB_DLY_COUNT2 > 4)
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kPDB_ADCPreTriggerChannel4ErrorFlag = PDB_S_ERR(1U << 4), /*!< Pre-trigger 4 Error. */
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kPDB_ADCPreTriggerChannel5ErrorFlag = PDB_S_ERR(1U << 5), /*!< Pre-trigger 5 Error. */
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kPDB_ADCPreTriggerChannel6ErrorFlag = PDB_S_ERR(1U << 6), /*!< Pre-trigger 6 Error. */
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kPDB_ADCPreTriggerChannel7ErrorFlag = PDB_S_ERR(1U << 7), /*!< Pre-trigger 7 Error. */
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#endif /* PDB_DLY_COUNT2 > 4 */
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};
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/*!
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* @brief PDB buffer interrupts.
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*/
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enum _pdb_interrupt_enable
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{
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kPDB_SequenceErrorInterruptEnable = PDB_SC_PDBEIE_MASK, /*!< PDB sequence error interrupt enable. */
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kPDB_DelayInterruptEnable = PDB_SC_PDBIE_MASK, /*!< PDB delay interrupt enable. */
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};
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/*!
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* @brief PDB load value mode.
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*
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* Selects the mode to load the internal values after doing the load operation (write 1 to PDBx_SC[LDOK]).
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* These values are for the following operations.
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* - PDB counter (PDBx_MOD, PDBx_IDLY)
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* - ADC trigger (PDBx_CHnDLYm)
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* - DAC trigger (PDBx_DACINTx)
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* - CMP trigger (PDBx_POyDLY)
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*/
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typedef enum _pdb_load_value_mode
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{
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kPDB_LoadValueImmediately = 0U, /*!< Load immediately after 1 is written to LDOK. */
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kPDB_LoadValueOnCounterOverflow = 1U, /*!< Load when the PDB counter overflows (reaches the MOD
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register value). */
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kPDB_LoadValueOnTriggerInput = 2U, /*!< Load a trigger input event is detected. */
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kPDB_LoadValueOnCounterOverflowOrTriggerInput = 3U, /*!< Load either when the PDB counter overflows or a trigger
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input is detected. */
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} pdb_load_value_mode_t;
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/*!
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* @brief Prescaler divider.
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*
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* Counting uses the peripheral clock divided by multiplication factor selected by times of MULT.
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*/
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typedef enum _pdb_prescaler_divider
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{
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kPDB_PrescalerDivider1 = 0U, /*!< Divider x1. */
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kPDB_PrescalerDivider2 = 1U, /*!< Divider x2. */
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kPDB_PrescalerDivider4 = 2U, /*!< Divider x4. */
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kPDB_PrescalerDivider8 = 3U, /*!< Divider x8. */
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kPDB_PrescalerDivider16 = 4U, /*!< Divider x16. */
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kPDB_PrescalerDivider32 = 5U, /*!< Divider x32. */
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kPDB_PrescalerDivider64 = 6U, /*!< Divider x64. */
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kPDB_PrescalerDivider128 = 7U, /*!< Divider x128. */
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} pdb_prescaler_divider_t;
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/*!
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* @brief Multiplication factor select for prescaler.
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*
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* Selects the multiplication factor of the prescaler divider for the counter clock.
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*/
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typedef enum _pdb_divider_multiplication_factor
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{
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kPDB_DividerMultiplicationFactor1 = 0U, /*!< Multiplication factor is 1. */
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kPDB_DividerMultiplicationFactor10 = 1U, /*!< Multiplication factor is 10. */
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kPDB_DividerMultiplicationFactor20 = 2U, /*!< Multiplication factor is 20. */
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kPDB_DividerMultiplicationFactor40 = 3U, /*!< Multiplication factor is 40. */
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} pdb_divider_multiplication_factor_t;
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/*!
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* @brief Trigger input source
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*
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* Selects the trigger input source for the PDB. The trigger input source can be internal or external (EXTRG pin), or
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* the software trigger. See chip configuration details for the actual PDB input trigger connections.
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*/
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typedef enum _pdb_trigger_input_source
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{
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kPDB_TriggerInput0 = 0U, /*!< Trigger-In 0. */
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kPDB_TriggerInput1 = 1U, /*!< Trigger-In 1. */
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kPDB_TriggerInput2 = 2U, /*!< Trigger-In 2. */
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kPDB_TriggerInput3 = 3U, /*!< Trigger-In 3. */
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kPDB_TriggerInput4 = 4U, /*!< Trigger-In 4. */
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kPDB_TriggerInput5 = 5U, /*!< Trigger-In 5. */
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kPDB_TriggerInput6 = 6U, /*!< Trigger-In 6. */
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kPDB_TriggerInput7 = 7U, /*!< Trigger-In 7. */
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kPDB_TriggerInput8 = 8U, /*!< Trigger-In 8. */
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kPDB_TriggerInput9 = 9U, /*!< Trigger-In 9. */
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kPDB_TriggerInput10 = 10U, /*!< Trigger-In 10. */
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kPDB_TriggerInput11 = 11U, /*!< Trigger-In 11. */
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kPDB_TriggerInput12 = 12U, /*!< Trigger-In 12. */
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kPDB_TriggerInput13 = 13U, /*!< Trigger-In 13. */
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kPDB_TriggerInput14 = 14U, /*!< Trigger-In 14. */
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kPDB_TriggerSoftware = 15U, /*!< Trigger-In 15, software trigger. */
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} pdb_trigger_input_source_t;
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/*!
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* @brief PDB module configuration.
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*/
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typedef struct _pdb_config
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{
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pdb_load_value_mode_t loadValueMode; /*!< Select the load value mode. */
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pdb_prescaler_divider_t prescalerDivider; /*!< Select the prescaler divider. */
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pdb_divider_multiplication_factor_t dividerMultiplicationFactor; /*!< Multiplication factor select for prescaler. */
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pdb_trigger_input_source_t triggerInputSource; /*!< Select the trigger input source. */
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bool enableContinuousMode; /*!< Enable the PDB operation in Continuous mode.*/
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} pdb_config_t;
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/*!
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* @brief PDB ADC Pre-trigger configuration.
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*/
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typedef struct _pdb_adc_pretrigger_config
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{
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uint32_t enablePreTriggerMask; /*!< PDB Channel Pre-trigger Enable. */
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uint32_t enableOutputMask; /*!< PDB Channel Pre-trigger Output Select.
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PDB channel's corresponding pre-trigger asserts when the counter
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reaches the channel delay register. */
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uint32_t enableBackToBackOperationMask; /*!< PDB Channel pre-trigger Back-to-Back Operation Enable.
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Back-to-back operation enables the ADC conversions complete to trigger
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the next PDB channel pre-trigger and trigger output, so that the ADC
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conversions can be triggered on next set of configuration and results
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registers.*/
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} pdb_adc_pretrigger_config_t;
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/*!
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* @brief PDB DAC trigger configuration.
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*/
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typedef struct _pdb_dac_trigger_config
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{
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bool enableExternalTriggerInput; /*!< Enables the external trigger for DAC interval counter. */
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bool enableIntervalTrigger; /*!< Enables the DAC interval trigger. */
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} pdb_dac_trigger_config_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @name Initialization
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* @{
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*/
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/*!
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* @brief Initializes the PDB module.
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*
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* This function initializes the PDB module. The operations included are as follows.
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* - Enable the clock for PDB instance.
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* - Configure the PDB module.
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* - Enable the PDB module.
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*
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* @param base PDB peripheral base address.
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* @param config Pointer to the configuration structure. See "pdb_config_t".
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*/
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void PDB_Init(PDB_Type *base, const pdb_config_t *config);
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/*!
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* @brief De-initializes the PDB module.
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*
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* @param base PDB peripheral base address.
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*/
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void PDB_Deinit(PDB_Type *base);
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/*!
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* @brief Initializes the PDB user configuration structure.
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*
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* This function initializes the user configuration structure to a default value. The default values are as follows.
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* @code
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* config->loadValueMode = kPDB_LoadValueImmediately;
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* config->prescalerDivider = kPDB_PrescalerDivider1;
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* config->dividerMultiplicationFactor = kPDB_DividerMultiplicationFactor1;
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* config->triggerInputSource = kPDB_TriggerSoftware;
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* config->enableContinuousMode = false;
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* @endcode
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* @param config Pointer to configuration structure. See "pdb_config_t".
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*/
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void PDB_GetDefaultConfig(pdb_config_t *config);
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/*!
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* @brief Enables the PDB module.
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*
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* @param base PDB peripheral base address.
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* @param enable Enable the module or not.
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*/
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static inline void PDB_Enable(PDB_Type *base, bool enable)
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{
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if (enable)
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{
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base->SC |= PDB_SC_PDBEN_MASK;
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}
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else
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{
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base->SC &= ~PDB_SC_PDBEN_MASK;
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}
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}
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/* @} */
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/*!
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* @name Basic Counter
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* @{
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*/
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/*!
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* @brief Triggers the PDB counter by software.
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*
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* @param base PDB peripheral base address.
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*/
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static inline void PDB_DoSoftwareTrigger(PDB_Type *base)
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{
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base->SC |= PDB_SC_SWTRIG_MASK;
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}
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/*!
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* @brief Loads the counter values.
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*
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* This function loads the counter values from the internal buffer.
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* See "pdb_load_value_mode_t" about PDB's load mode.
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*
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* @param base PDB peripheral base address.
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*/
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static inline void PDB_DoLoadValues(PDB_Type *base)
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{
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base->SC |= PDB_SC_LDOK_MASK;
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}
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/*!
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* @brief Enables the DMA for the PDB module.
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*
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* @param base PDB peripheral base address.
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* @param enable Enable the feature or not.
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*/
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static inline void PDB_EnableDMA(PDB_Type *base, bool enable)
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{
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if (enable)
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{
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base->SC |= PDB_SC_DMAEN_MASK;
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}
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else
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{
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base->SC &= ~PDB_SC_DMAEN_MASK;
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}
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}
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/*!
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* @brief Enables the interrupts for the PDB module.
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*
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* @param base PDB peripheral base address.
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* @param mask Mask value for interrupts. See "_pdb_interrupt_enable".
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*/
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static inline void PDB_EnableInterrupts(PDB_Type *base, uint32_t mask)
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{
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assert(0U == (mask & ~(PDB_SC_PDBEIE_MASK | PDB_SC_PDBIE_MASK)));
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||
|
|
base->SC |= mask;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Disables the interrupts for the PDB module.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param mask Mask value for interrupts. See "_pdb_interrupt_enable".
|
||
|
|
*/
|
||
|
|
static inline void PDB_DisableInterrupts(PDB_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
assert(0U == (mask & ~(PDB_SC_PDBEIE_MASK | PDB_SC_PDBIE_MASK)));
|
||
|
|
|
||
|
|
base->SC &= ~mask;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the status flags of the PDB module.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
*
|
||
|
|
* @return Mask value for asserted flags. See "_pdb_status_flags".
|
||
|
|
*/
|
||
|
|
static inline uint32_t PDB_GetStatusFlags(PDB_Type *base)
|
||
|
|
{
|
||
|
|
return base->SC & (PDB_SC_PDBIF_MASK | PDB_SC_LDOK_MASK);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Clears the status flags of the PDB module.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param mask Mask value of flags. See "_pdb_status_flags".
|
||
|
|
*/
|
||
|
|
static inline void PDB_ClearStatusFlags(PDB_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
assert(0U == (mask & ~PDB_SC_PDBIF_MASK));
|
||
|
|
|
||
|
|
base->SC &= ~mask;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Specifies the counter period.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param value Setting value for the modulus. 16-bit is available.
|
||
|
|
*/
|
||
|
|
static inline void PDB_SetModulusValue(PDB_Type *base, uint32_t value)
|
||
|
|
{
|
||
|
|
base->MOD = PDB_MOD_MOD(value);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the PDB counter's current value.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
*
|
||
|
|
* @return PDB counter's current value.
|
||
|
|
*/
|
||
|
|
static inline uint32_t PDB_GetCounterValue(PDB_Type *base)
|
||
|
|
{
|
||
|
|
return base->CNT;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Sets the value for the PDB counter delay event.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param value Setting value for PDB counter delay event. 16-bit is available.
|
||
|
|
*/
|
||
|
|
static inline void PDB_SetCounterDelayValue(PDB_Type *base, uint32_t value)
|
||
|
|
{
|
||
|
|
base->IDLY = PDB_IDLY_IDLY(value);
|
||
|
|
}
|
||
|
|
/* @} */
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @name ADC Pre-trigger
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Configures the ADC pre-trigger in the PDB module.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param channel Channel index for ADC instance.
|
||
|
|
* @param config Pointer to the configuration structure. See "pdb_adc_pretrigger_config_t".
|
||
|
|
*/
|
||
|
|
static inline void PDB_SetADCPreTriggerConfig(PDB_Type *base, uint32_t channel, pdb_adc_pretrigger_config_t *config)
|
||
|
|
{
|
||
|
|
assert(channel < PDB_C1_COUNT);
|
||
|
|
assert(NULL != config);
|
||
|
|
|
||
|
|
base->CH[channel].C1 = PDB_C1_BB(config->enableBackToBackOperationMask) | PDB_C1_TOS(config->enableOutputMask) |
|
||
|
|
PDB_C1_EN(config->enablePreTriggerMask);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Sets the value for the ADC pre-trigger delay event.
|
||
|
|
*
|
||
|
|
* This function sets the value for ADC pre-trigger delay event. It specifies the delay value for the channel's
|
||
|
|
* corresponding pre-trigger. The pre-trigger asserts when the PDB counter is equal to the set value.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param channel Channel index for ADC instance.
|
||
|
|
* @param preChannel Channel group index for ADC instance.
|
||
|
|
* @param value Setting value for ADC pre-trigger delay event. 16-bit is available.
|
||
|
|
*/
|
||
|
|
static inline void PDB_SetADCPreTriggerDelayValue(PDB_Type *base, uint32_t channel, uint32_t preChannel, uint32_t value)
|
||
|
|
{
|
||
|
|
assert(channel < PDB_C1_COUNT);
|
||
|
|
assert(preChannel < PDB_DLY_COUNT2);
|
||
|
|
/* xx_COUNT2 is actually the count for pre-triggers in header file. xx_COUNT is used for the count of channels. */
|
||
|
|
|
||
|
|
base->CH[channel].DLY[preChannel] = PDB_DLY_DLY(value);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the ADC pre-trigger's status flags.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param channel Channel index for ADC instance.
|
||
|
|
*
|
||
|
|
* @return Mask value for asserted flags. See "_pdb_adc_pretrigger_flags".
|
||
|
|
*/
|
||
|
|
static inline uint32_t PDB_GetADCPreTriggerStatusFlags(PDB_Type *base, uint32_t channel)
|
||
|
|
{
|
||
|
|
assert(channel < PDB_C1_COUNT);
|
||
|
|
|
||
|
|
return base->CH[channel].S;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Clears the ADC pre-trigger status flags.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param channel Channel index for ADC instance.
|
||
|
|
* @param mask Mask value for flags. See "_pdb_adc_pretrigger_flags".
|
||
|
|
*/
|
||
|
|
static inline void PDB_ClearADCPreTriggerStatusFlags(PDB_Type *base, uint32_t channel, uint32_t mask)
|
||
|
|
{
|
||
|
|
assert(channel < PDB_C1_COUNT);
|
||
|
|
|
||
|
|
base->CH[channel].S &= ~mask;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* @} */
|
||
|
|
|
||
|
|
#if defined(FSL_FEATURE_PDB_HAS_DAC) && FSL_FEATURE_PDB_HAS_DAC
|
||
|
|
/*!
|
||
|
|
* @name DAC Interval Trigger
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Configures the DAC trigger in the PDB module.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param channel Channel index for DAC instance.
|
||
|
|
* @param config Pointer to the configuration structure. See "pdb_dac_trigger_config_t".
|
||
|
|
*/
|
||
|
|
void PDB_SetDACTriggerConfig(PDB_Type *base, uint32_t channel, pdb_dac_trigger_config_t *config);
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Sets the value for the DAC interval event.
|
||
|
|
*
|
||
|
|
* This fucntion sets the value for DAC interval event. DAC interval trigger triggers the DAC module to update
|
||
|
|
* the buffer when the DAC interval counter is equal to the set value.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param channel Channel index for DAC instance.
|
||
|
|
* @param value Setting value for the DAC interval event.
|
||
|
|
*/
|
||
|
|
static inline void PDB_SetDACTriggerIntervalValue(PDB_Type *base, uint32_t channel, uint32_t value)
|
||
|
|
{
|
||
|
|
assert(channel < PDB_INT_COUNT);
|
||
|
|
|
||
|
|
base->DAC[channel].INT = PDB_INT_INT(value);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* @} */
|
||
|
|
#endif /* FSL_FEATURE_PDB_HAS_DAC */
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @name Pulse-Out Trigger
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Enables the pulse out trigger channels.
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param channelMask Channel mask value for multiple pulse out trigger channel.
|
||
|
|
* @param enable Whether the feature is enabled or not.
|
||
|
|
*/
|
||
|
|
static inline void PDB_EnablePulseOutTrigger(PDB_Type *base, uint32_t channelMask, bool enable)
|
||
|
|
{
|
||
|
|
if (enable)
|
||
|
|
{
|
||
|
|
base->POEN |= PDB_POEN_POEN(channelMask);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
base->POEN &= ~(PDB_POEN_POEN(channelMask));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Sets event values for the pulse out trigger.
|
||
|
|
*
|
||
|
|
* This function is used to set event values for the pulse output trigger.
|
||
|
|
* These pulse output trigger delay values specify the delay for the PDB Pulse-out. Pulse-out goes high when the PDB
|
||
|
|
* counter is equal to the pulse output high value (value1). Pulse-out goes low when the PDB counter is equal to the
|
||
|
|
* pulse output low value (value2).
|
||
|
|
*
|
||
|
|
* @param base PDB peripheral base address.
|
||
|
|
* @param channel Channel index for pulse out trigger channel.
|
||
|
|
* @param value1 Setting value for pulse out high.
|
||
|
|
* @param value2 Setting value for pulse out low.
|
||
|
|
*/
|
||
|
|
static inline void PDB_SetPulseOutTriggerDelayValue(PDB_Type *base, uint32_t channel, uint32_t value1, uint32_t value2)
|
||
|
|
{
|
||
|
|
assert(channel < PDB_PODLY_COUNT);
|
||
|
|
|
||
|
|
base->PODLY[channel] = PDB_PODLY_DLY1(value1) | PDB_PODLY_DLY2(value2);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* @} */
|
||
|
|
#if defined(__cplusplus)
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
/*!
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
#endif /* _FSL_PDB_H_ */
|