232 lines
8.5 KiB
C
232 lines
8.5 KiB
C
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/*
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** ###################################################################
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** Version: rev. 1.1, 2016-11-25
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** Build: b170112
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**
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** Abstract:
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** Chip specific module features.
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**
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** Copyright (c) 2016 Freescale Semiconductor, Inc.
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** Copyright 2016 - 2017 NXP
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** Redistribution and use in source and binary forms, with or without modification,
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** are permitted provided that the following conditions are met:
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**
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** o Redistributions of source code must retain the above copyright notice, this list
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** of conditions and the following disclaimer.
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**
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** o Redistributions in binary form must reproduce the above copyright notice, this
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** list of conditions and the following disclaimer in the documentation and/or
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** other materials provided with the distribution.
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**
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** o Neither the name of the copyright holder nor the names of its
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** contributors may be used to endorse or promote products derived from this
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** software without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** Revisions:
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** - rev. 1.0 (2016-08-12)
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** Initial version.
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** - rev. 1.1 (2016-11-25)
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** Update CANFD and Classic CAN register.
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** Add MAC TIMERSTAMP registers.
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**
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** ###################################################################
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*/
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#ifndef _LPC54608_FEATURES_H_
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#define _LPC54608_FEATURES_H_
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/* SOC module features */
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/* @brief ADC availability on the SoC. */
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#define FSL_FEATURE_SOC_ADC_COUNT (1)
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/* @brief ASYNC_SYSCON availability on the SoC. */
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#define FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT (1)
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/* @brief CRC availability on the SoC. */
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#define FSL_FEATURE_SOC_CRC_COUNT (1)
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/* @brief DMA availability on the SoC. */
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#define FSL_FEATURE_SOC_DMA_COUNT (1)
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/* @brief DMIC availability on the SoC. */
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#define FSL_FEATURE_SOC_DMIC_COUNT (1)
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/* @brief FLEXCOMM availability on the SoC. */
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#define FSL_FEATURE_SOC_FLEXCOMM_COUNT (10)
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/* @brief GINT availability on the SoC. */
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#define FSL_FEATURE_SOC_GINT_COUNT (2)
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/* @brief GPIO availability on the SoC. */
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#define FSL_FEATURE_SOC_GPIO_COUNT (1)
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/* @brief I2C availability on the SoC. */
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#define FSL_FEATURE_SOC_I2C_COUNT (10)
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/* @brief I2S availability on the SoC. */
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#define FSL_FEATURE_SOC_I2S_COUNT (2)
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/* @brief INPUTMUX availability on the SoC. */
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#define FSL_FEATURE_SOC_INPUTMUX_COUNT (1)
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/* @brief IOCON availability on the SoC. */
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#define FSL_FEATURE_SOC_IOCON_COUNT (1)
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/* @brief MRT availability on the SoC. */
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#define FSL_FEATURE_SOC_MRT_COUNT (1)
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/* @brief PINT availability on the SoC. */
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#define FSL_FEATURE_SOC_PINT_COUNT (1)
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/* @brief RTC availability on the SoC. */
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#define FSL_FEATURE_SOC_RTC_COUNT (1)
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/* @brief SCT availability on the SoC. */
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#define FSL_FEATURE_SOC_SCT_COUNT (1)
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/* @brief SPI availability on the SoC. */
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#define FSL_FEATURE_SOC_SPI_COUNT (10)
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/* @brief SPIFI availability on the SoC. */
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#define FSL_FEATURE_SOC_SPIFI_COUNT (1)
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/* @brief SYSCON availability on the SoC. */
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#define FSL_FEATURE_SOC_SYSCON_COUNT (1)
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/* @brief CTIMER availability on the SoC. */
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#define FSL_FEATURE_SOC_CTIMER_COUNT (5)
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/* @brief USART availability on the SoC. */
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#define FSL_FEATURE_SOC_USART_COUNT (10)
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/* @brief USB availability on the SoC. */
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#define FSL_FEATURE_SOC_USB_COUNT (1)
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/* @brief UTICK availability on the SoC. */
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#define FSL_FEATURE_SOC_UTICK_COUNT (1)
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/* @brief WWDT availability on the SoC. */
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#define FSL_FEATURE_SOC_WWDT_COUNT (1)
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/* @brief USBFSH availability on the SoC. */
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#define FSL_FEATURE_SOC_USBFSH_COUNT (1)
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/* @brief USBHSD availability on the SoC. */
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#define FSL_FEATURE_SOC_USBHSD_COUNT (1)
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/* @brief USBHSH availability on the SoC. */
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#define FSL_FEATURE_SOC_USBHSH_COUNT (1)
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/* @brief EEPROM availability on the SoC. */
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#define FSL_FEATURE_SOC_EEPROM_COUNT (1)
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/* @brief EMC availability on the SoC. */
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#define FSL_FEATURE_SOC_EMC_COUNT (1)
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/* @brief ENET availability on the SoC. */
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#define FSL_FEATURE_SOC_LPC_ENET_COUNT (1)
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/* @brief SDIF availability on the SoC. */
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#define FSL_FEATURE_SOC_SDIF_COUNT (1)
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/* @brief SMARTCARD availability on the SoC. */
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#define FSL_FEATURE_SOC_SMARTCARD_COUNT (2)
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/* @brief LCD availability on the SoC. */
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#define FSL_FEATURE_SOC_LCD_COUNT (1)
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/* @brief CAN availability on the SoC. */
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#define FSL_FEATURE_SOC_LPC_CAN_COUNT (2)
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/* @brief SHA availability on the SoC. */
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#define FSL_FEATURE_SOC_SHA_COUNT (0)
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/* @brief AES availability on the SoC. */
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#define FSL_FEATURE_SOC_AES_COUNT (0)
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/* @brief RIT availability on the SoC. */
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#define FSL_FEATURE_SOC_RIT_COUNT (1)
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/* @brief FMC availability on the SoC. */
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#define FSL_FEATURE_SOC_FMC_COUNT (1)
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/* @brief RNG availability on the SoC. */
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#define FSL_FEATURE_SOC_LPC_RNG_COUNT (1)
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/* CAN module features */
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/* @brief Support CANFD or not */
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#define FSL_FEATURE_CAN_SUPPORT_CANFD (0)
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/* DMA module features */
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/* @brief Number of channels */
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#define FSL_FEATURE_DMA_NUMBER_OF_CHANNELS (30)
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/* EEPROM module features */
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/* @brief Size of the EEPROM */
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#define FSL_FEATURE_EEPROM_SIZE (0x00004000)
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/* @brief Base address of the EEPROM */
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#define FSL_FEATURE_EEPROM_BASE_ADDRESS (0x40108000)
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/* @brief Page count of the EEPROM */
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#define FSL_FEATURE_EEPROM_PAGE_COUNT (128)
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/* @brief Command number for eeprom program */
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#define FSL_FEATURE_EEPROM_PROGRAM_CMD (6)
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/* @brief EEPROM internal clock freqency */
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#define FSL_FEATURE_EEPROM_INTERNAL_FREQ (1500000)
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/* IOCON module features */
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/* @brief Func bit field width */
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#define FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH (4)
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/* PINT module features */
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/* @brief Number of connected outputs */
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#define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS (8)
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/* SCT module features */
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/* @brief Number of events */
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#define FSL_FEATURE_SCT_NUMBER_OF_EVENTS (10)
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/* @brief Number of states */
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#define FSL_FEATURE_SCT_NUMBER_OF_STATES (10)
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/* @brief Number of match capture */
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#define FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE (10)
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/* SDIF module features */
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/* @brief FIFO depth, every location is a WORD */
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#define FSL_FEATURE_SDIF_FIFO_DEPTH_64_32BITS (64)
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/* @brief Max DMA buffer size */
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#define FSL_FEATURE_SDIF_INTERNAL_DMA_MAX_BUFFER_SIZE (4096)
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/* @brief Max source clock in HZ */
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#define FSL_FEATURE_SDIF_MAX_SOURCE_CLOCK (52000000)
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/* SPIFI module features */
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/* @brief SPIFI start address */
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#define FSL_FEATURE_SPIFI_START_ADDR (0x10000000)
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/* @brief SPIFI end address */
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#define FSL_FEATURE_SPIFI_END_ADDR (0x17FFFFFF)
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/* SYSCON module features */
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/* @brief Pointer to ROM IAP entry functions */
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#define FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION (0x03000205)
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/* @brief Flash page size in bytes */
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#define FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES (256)
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/* @brief Flash sector size in bytes */
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#define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (32768)
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/* @brief Flash size in bytes */
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#define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (524288)
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/* USB module features */
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/* @brief Size of the USB dedicated RAM */
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#define FSL_FEATURE_USB_USB_RAM (0x00002000)
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/* @brief Base address of the USB dedicated RAM */
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#define FSL_FEATURE_USB_USB_RAM_BASE_ADDRESS (0x40100000)
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/* USBFSH module features */
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/* @brief Size of the USB dedicated RAM */
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#define FSL_FEATURE_USBFSH_USB_RAM (0x00002000)
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/* @brief Base address of the USB dedicated RAM */
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#define FSL_FEATURE_USBFSH_USB_RAM_BASE_ADDRESS (0x40100000)
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/* USBHSD module features */
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/* @brief Size of the USB dedicated RAM */
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#define FSL_FEATURE_USBHSD_USB_RAM (0x00002000)
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/* @brief Base address of the USB dedicated RAM */
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#define FSL_FEATURE_USBHSD_USB_RAM_BASE_ADDRESS (0x40100000)
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/* USBHSH module features */
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/* @brief Size of the USB dedicated RAM */
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#define FSL_FEATURE_USBHSH_USB_RAM (0x00002000)
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/* @brief Base address of the USB dedicated RAM */
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#define FSL_FEATURE_USBHSH_USB_RAM_BASE_ADDRESS (0x40100000)
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#endif /* _LPC54608_FEATURES_H_ */
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