2011-08-08 17:24:44 +08:00
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/*
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* File : interrupt.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2010-10-15 Bernard first version
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* 2010-10-15 lgnq modified for LS1B
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*/
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2012-05-15 14:16:37 +08:00
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2011-08-08 17:24:44 +08:00
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#include <rtthread.h>
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#include "ls1b.h"
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#define MAX_INTR 32
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extern rt_uint32_t rt_interrupt_nest;
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2012-05-15 14:16:37 +08:00
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rt_uint32_t rt_interrupt_from_thread;
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rt_uint32_t rt_interrupt_to_thread;
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2011-09-09 15:30:39 +08:00
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rt_uint32_t rt_thread_switch_interrupt_flag;
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2011-08-08 17:24:44 +08:00
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static rt_isr_handler_t irq_handle_table[MAX_INTR];
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void rt_interrupt_dispatch(void *ptreg);
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void rt_hw_timer_handler();
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static struct ls1b_intc_regs volatile *ls1b_hw0_icregs
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= (struct ls1b_intc_regs volatile *)(LS1B_INTREG_BASE);
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/**
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2012-05-15 14:16:37 +08:00
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* @addtogroup Loongson LS1B
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2011-08-08 17:24:44 +08:00
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*/
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2012-05-15 14:16:37 +08:00
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2011-08-08 17:24:44 +08:00
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/*@{*/
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void rt_hw_interrupt_handler(int vector)
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{
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rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
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}
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/**
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* This function will initialize hardware interrupt
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*/
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2012-05-15 14:16:37 +08:00
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void rt_hw_interrupt_init(void)
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2011-08-08 17:24:44 +08:00
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{
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rt_int32_t index;
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/* pci active low */
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ls1b_hw0_icregs->int_pol = -1; //must be done here 20110802 lgnq
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/* make all interrupts level triggered */
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(ls1b_hw0_icregs+0)->int_edge = 0x0000e000;
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/* mask all interrupts */
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(ls1b_hw0_icregs+0)->int_clr = 0xffffffff;
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for (index = 0; index < MAX_INTR; index ++)
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{
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irq_handle_table[index] = (rt_isr_handler_t)rt_hw_interrupt_handler;
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}
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/* init interrupt nest, and context in thread sp */
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rt_interrupt_nest = 0;
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rt_interrupt_from_thread = 0;
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rt_interrupt_to_thread = 0;
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2011-09-09 15:30:39 +08:00
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rt_thread_switch_interrupt_flag = 0;
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2011-08-08 17:24:44 +08:00
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}
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/**
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* This function will mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_mask(int vector)
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{
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/* mask interrupt */
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(ls1b_hw0_icregs+(vector>>5))->int_en &= ~(1 << (vector&0x1f));
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}
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/**
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* This function will un-mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_umask(int vector)
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{
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(ls1b_hw0_icregs+(vector>>5))->int_en |= (1 << (vector&0x1f));
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}
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/**
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* This function will install a interrupt service routine to a interrupt.
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* @param vector the interrupt number
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* @param new_handler the interrupt service routine to be installed
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* @param old_handler the old interrupt service routine
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*/
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void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_handler_t *old_handler)
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{
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if (vector >= 0 && vector < MAX_INTR)
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{
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if (old_handler != RT_NULL)
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*old_handler = irq_handle_table[vector];
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if (new_handler != RT_NULL)
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irq_handle_table[vector] = (rt_isr_handler_t)new_handler;
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}
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}
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void rt_interrupt_dispatch(void *ptreg)
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{
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int i;
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rt_isr_handler_t irq_func;
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static rt_uint32_t status = 0;
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rt_uint32_t c0_status;
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rt_uint32_t c0_cause;
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volatile rt_uint32_t cause_im;
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volatile rt_uint32_t status_im;
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rt_uint32_t pending_im;
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/* check os timer */
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c0_status = read_c0_status();
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c0_cause = read_c0_cause();
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cause_im = c0_cause & ST0_IM;
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status_im = c0_status & ST0_IM;
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pending_im = cause_im & status_im;
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if (pending_im & CAUSEF_IP7)
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{
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rt_hw_timer_handler();
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}
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if (pending_im & CAUSEF_IP2)
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{
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/* the hardware interrupt */
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status = ls1b_hw0_icregs->int_isr;
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if (!status)
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return;
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for (i = MAX_INTR; i > 0; --i)
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{
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if ((status & (1<<i)))
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{
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status &= ~(1<<i);
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irq_func = irq_handle_table[i];
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/* do interrupt */
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(*irq_func)(i);
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/* ack interrupt */
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ls1b_hw0_icregs->int_clr |= (1 << i);
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}
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}
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}
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else if (pending_im & CAUSEF_IP3)
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{
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rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
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}
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else if (pending_im & CAUSEF_IP4)
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{
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rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
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}
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else if (pending_im & CAUSEF_IP5)
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{
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rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
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}
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else if (pending_im & CAUSEF_IP6)
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{
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rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
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}
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}
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/*@}*/
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