105 lines
5.9 KiB
C
105 lines
5.9 KiB
C
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/*
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** ###################################################################
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** Processor: PK40X256VLQ100
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** Compilers: ARM Compiler
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** Freescale C/C++ for Embedded ARM
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** GNU ARM C Compiler
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** IAR ANSI C/C++ Compiler for ARM
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** Reference manual: K40P144M100SF2RM, Rev. 3, 4 Nov 2010
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** Version: rev. 1.6, 2011-01-14
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**
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** Abstract:
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** Provides a system configuration function and a global variable that contains the system frequency.
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** It configures the device and initializes the oscillator (PLL) that is part of the microcontroller device.
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**
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** Copyright: 2011 Freescale Semiconductor, Inc. All Rights Reserved.
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**
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** http: www.freescale.com
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** mail: support@freescale.com
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**
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** Revisions:
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** - rev. 0.1 (2010-09-29)
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** Initial version
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** - rev. 1.0 (2010-10-15)
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** First public version
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** - rev. 1.1 (2010-10-27)
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** Registers updated according to the new reference manual revision - Rev. 2, 15 Oct 2010
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** ADC - Peripheral register PGA bit definition has been fixed, bits PGALP, PGACHP removed.
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** CAN - Peripheral register MCR bit definition has been fixed, bit WAKSRC removed.
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** CRC - Peripheral register layout structure has been extended with 8/16-bit access to shadow registers.
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** CMP - Peripheral base address macro renamed from HSCMPx_BASE to CMPx_BASE.
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** CMP - Peripheral base pointer macro renamed from HSCMPx to CMPx.
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** DMA - Peripheral base address macro renamed from eDMA_BASE to DMA_BASE.
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** DMA - Peripheral base pointer macro renamed from eDMA to DMA.
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** GPIO - Port Output Enable Register (POER) has been renamed to Port Data Direction Register (PDDR), all POER related macros fixed to PDDR.
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** LCD - Peripheral base address macro renamed from SLCD_BASE to LCD_BASE.
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** LCD - Peripheral base pointer macro renamed from SLCD to LCD.
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** PDB - Peripheral register layout structure has been extended for Channel n and DAC n register array access (#MTWX44115).
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** RFSYS - System regfile registers have been added (#MTWX43999)
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** RFVBAT - VBAT regfile registers have been added (#MTWX43999)
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** RTC - Peripheral register CR bit definition has been fixed, bit OTE removed.
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** TSI - Peripheral registers STATUS, SCANC bit definition have been fixed, bit groups CAPTRM, DELVOL and AMCLKDIV added.
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** USB - Peripheral base address macro renamed from USBOTG0_BASE to USB0_BASE.
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** USB - Peripheral base pointer macro renamed from USBOTG0 to USB0.
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** VREF - Peripheral register TRM removed.
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** - rev. 1.2 (2010-11-11)
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** Registers updated according to the new reference manual revision - Rev. 3, 4 Nov 2010
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** CAN - Individual Matching Element Update (IMEU) feature has been removed.
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** CAN - Peripheral register layout structure has been fixed, registers IMEUR, LRFR have been removed.
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** CAN - Peripheral register CTRL2 bit definition has been fixed, bits IMEUMASK, LOSTRMMSK, LOSTRLMSK, IMEUEN have been removed.
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** CAN - Peripheral register ESR2 bit definition has been fixed, bits IMEUF, LOSTRMF, LOSTRLF have been removed.
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** NV - Fixed offset address of BACKKEYx, FPROTx registers.
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** TSI - Peripheral register layout structure has been fixed, register WUCNTR has been removed.
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** - rev. 1.3 (2010-11-19)
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** CAN - Support for CAN0_IMEU_IRQn, CAN0_Lost_Rx_IRQn interrupts has been removed.
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** CAN - Support for CAN1_IMEU_IRQn, CAN1_Lost_Rx_IRQn interrupts has been removed.
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** - rev. 1.4 (2010-11-30)
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** EWM - Peripheral base address EWM_BASE definition has been fixed from 0x4005F000u to 0x40061000u (#MTWX44776).
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** - rev. 1.5 (2010-12-17)
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** AIPS0, AIPS1 - Fixed offset of PACRE-PACRP registers (#MTWX45259).
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** - rev. 1.6 (2011-01-14)
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** Added BITBAND_REG() macro to provide access to register bits using bit band region.
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**
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** ###################################################################
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*/
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/*! \file PK40X256VLQ100 */
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/*! \version 1.6 */
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/*! \date 2011-01-14 */
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/*! \brief Device specific configuration file for PK40X256VLQ100 (header file) */
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/*! \detailed Provides a system configuration function and a global variable that contains the system frequency.
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It configures the device and initializes the oscillator (PLL) that is part of the microcontroller device. */
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#ifndef SYSTEM_PK40X256VLQ100_H_
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#define SYSTEM_PK40X256VLQ100_H_ /*!< Symbol preventing repeated inclusion */
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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/*! \brief System clock frequency (core clock)
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\detailed The system clock frequency supplied to the SysTick timer and the processor core clock.
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This variable can be used by the user application to setup the SysTick timer or configure other parameters.
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It may also be used by debugger to query the frequency of the debug timer or configure the trace clock speed.
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SystemCoreClock is initialized with a correct predefined value. */
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extern uint32_t SystemCoreClock;
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/*! \brief Setup the microcontroller system.
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\detailed Typically this function configures the oscillator (PLL) that is part of the microcontroller device.
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For systems with variable clock speed it also updates the variable SystemCoreClock.
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SystemInit is called from startup_device file. */
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void SystemInit (void);
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/*! \brief Updates the SystemCoreClock variable.
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\detailed It must be called whenever the core clock is changed during program execution.
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SystemCoreClockUpdate() evaluates the clock register settings and calculates the current core clock. */
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void SystemCoreClockUpdate (void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* #if !defined(SYSTEM_PK40X256VLQ100_H_) */
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