248 lines
8.9 KiB
C
248 lines
8.9 KiB
C
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/**************************************************************************//**
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* @file
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* @brief EFM32GG_DK3750 board support package SPI API implementation
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* @author Energy Micro AS
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* @version 1.2.1
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******************************************************************************
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* @section License
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* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
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******************************************************************************
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*
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* This source code is the property of Energy Micro AS. The source and compiled
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* code may only be used on Energy Micro "EFM32" microcontrollers.
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*
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* This copyright notice may not be removed from the source code nor changed.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
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* obligation to support this Software. Energy Micro AS is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Energy Micro AS will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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*****************************************************************************/
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/***************************************************************************//**
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* @addtogroup BSP
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* @{
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******************************************************************************/
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#include "efm32.h"
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#include "efm32_gpio.h"
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#include "efm32_usart.h"
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#include "efm32_cmu.h"
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#include "dvk.h"
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#include "dvk_bcregisters.h"
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/* USART used for SPI access */
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#define USART_USED USART2 /**< USART used for BC register interface */
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#define USART_CLK cmuClock_USART2 /**< Clock for BC register USART */
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/* GPIO pins used, please refer to DVK user guide. */
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#define PORT_SPI_TX gpioPortC /**< SPI transmit GPIO port */
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#define PIN_SPI_TX 2 /**< SPI transmit GPIO pin */
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#define PORT_SPI_RX gpioPortC /**< SPI receive GPIO port */
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#define PIN_SPI_RX 3 /**< SPI receive GPIO pin */
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#define PORT_SPI_CLK gpioPortC /**< SPI clock port */
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#define PIN_SPI_CLK 4 /**< SPI clock pin */
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#define PORT_SPI_CS gpioPortC /**< SPI Chip Select port */
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#define PIN_SPI_CS 5 /**< SPI Chip Select pin */
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static volatile const uint16_t *lastAddr = 0; /**< Last register accessed */
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/**************************************************************************//**
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* @brief Initializes SPI interface for access to board controller
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* FPGA registers
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*****************************************************************************/
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static void SPI_BC_Init(void)
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{
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USART_InitSync_TypeDef bcinit = USART_INITSYNC_DEFAULT;
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/* Enable module clocks */
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CMU_ClockEnable(USART_CLK, true);
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/* Configure SPI pins */
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GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModePushPull, 0);
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GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeInput, 0);
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GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModePushPull, 0);
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/* Keep CS high to not activate slave */
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GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModePushPull, 1);
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/* Configure to use SPI master with manual CS */
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/* For now, configure SPI for worst case 32MHz clock in order to work for all */
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/* configurations. */
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bcinit.refFreq = 48000000;
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bcinit.baudrate = 7000000;
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USART_Reset(USART_USED);
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/* Initialize USART */
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USART_InitSync(USART_USED, &bcinit);
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/* Enable pins at default location */
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USART_USED->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN;
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}
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/**************************************************************************//**
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* @brief Disables GPIO pins and USART from FPGA register access
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*****************************************************************************/
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static void SPI_BC_Disable(void)
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{
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USART_Reset(USART_USED);
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GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModeDisabled, 0);
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GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeDisabled, 0);
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GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModeDisabled, 0);
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GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModeDisabled, 0);
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/* Disable USART clock - we can't disable GPIO or HFPER as we don't know who else
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* might be using it */
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CMU_ClockEnable(USART_CLK, false);
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}
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/**************************************************************************//**
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* @brief Perform SPI Transfer
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* @param addr Register offset, starting at 0
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* @param rw 0 on write, 1 on read accesses
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* @param data 16-bit data to write into register/dummy data for reads
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* @return 16-bit data received from SPI access
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*****************************************************************************/
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static uint16_t SPI_BC_Access(uint8_t addr, uint8_t rw, uint16_t data)
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{
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uint16_t tmp;
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/* Enable CS */
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GPIO_PinOutClear(PORT_SPI_CS, PIN_SPI_CS);
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/* Write SPI address MSB */
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USART_Tx(USART_USED, (addr & 0x3) | rw << 3);
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/* Just ignore data read back */
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USART_Rx(USART_USED);
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/* Write SPI address LSB */
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USART_Tx(USART_USED, data & 0xFF);
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tmp = (uint16_t) USART_Rx(USART_USED);
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/* SPI data MSB */
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USART_Tx(USART_USED, data >> 8);
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tmp |= (uint16_t) USART_Rx(USART_USED) << 8;
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/* Disable CS */
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GPIO_PinOutSet(PORT_SPI_CS, PIN_SPI_CS);
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return tmp;
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}
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/**************************************************************************//**
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* @brief Performs SPI write to FPGA register
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* @param addr Address of register
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* @param data Data to write
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*****************************************************************************/
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static void SPI_BC_Write(uint8_t addr, uint16_t data)
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{
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SPI_BC_Access(addr, 0, data);
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}
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/**************************************************************************//**
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* @brief Performs SPI read from FPGA register
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* @param addr Address of register
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* @param data Dummy data
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* @return 16-bit value of board controller register
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*****************************************************************************/
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static uint16_t SPI_BC_Read(uint8_t addr, uint16_t data)
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{
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return SPI_BC_Access(addr, 1, data);
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}
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/**************************************************************************//**
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* @brief Initializes DVK register access
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* @return true on success, false on failure
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*****************************************************************************/
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bool DVK_SPI_init(void)
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{
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uint16_t bcMagic;
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/* Enable HF and GPIO clocks */
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CMU_ClockEnable(cmuClock_HFPER, true);
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CMU_ClockEnable(cmuClock_GPIO, true);
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/* Configure SPI mode of operation */
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DVK_busControlMode(DVK_BusControl_SPI);
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SPI_BC_Init();
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/* Read "board control Magic" register to verify SPI is up and running */
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/* if not FPGA is configured to be in EBI mode */
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bcMagic = DVK_SPI_readRegister(&BC_REGISTER->MAGIC);
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if (bcMagic != BC_MAGIC_VALUE)
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{
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return false;
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}
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else
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{
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return true;
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}
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}
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/**************************************************************************//**
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* @brief Disable and free up resources used by SPI board control access
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*****************************************************************************/
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void DVK_SPI_disable(void)
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{
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SPI_BC_Disable();
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}
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/**************************************************************************//**
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* @brief Perform read from DVK board control register
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* @param[in] addr Address of register to read from
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* @return Value of board controller register
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*****************************************************************************/
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uint16_t DVK_SPI_readRegister(volatile uint16_t *addr)
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{
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uint16_t data;
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if (addr != lastAddr)
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{
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SPI_BC_Write(0x00, 0xFFFF & ((uint32_t) addr)); /*LSBs of address*/
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SPI_BC_Write(0x01, 0xFF & ((uint32_t) addr >> 16)); /*MSBs of address*/
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SPI_BC_Write(0x02, (0x0C000000 & (uint32_t) addr) >> 26); /*Chip select*/
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}
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/* Read twice */
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data = SPI_BC_Read(0x03, 0);
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data = SPI_BC_Read(0x03, 0);
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lastAddr = addr;
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return data;
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}
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/**************************************************************************//**
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* @brief Perform write to DVK board control register
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* @param addr Address of register to write to
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* @param data 16-bit to write into register
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*****************************************************************************/
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void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data)
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{
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if (addr != lastAddr)
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{
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SPI_BC_Write(0x00, 0xFFFF & ((uint32_t) addr)); /*LSBs of address*/
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SPI_BC_Write(0x01, 0xFF & ((uint32_t) addr >> 16)); /*MSBs of address*/
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SPI_BC_Write(0x02, (0x0C000000 & (uint32_t) addr) >> 26); /*Chip select*/
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}
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SPI_BC_Write(0x03, data); /*Data*/
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lastAddr = addr;
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}
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/** @} (end group BSP) */
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