200 lines
5.5 KiB
C
200 lines
5.5 KiB
C
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#include <stm32f10x.h>
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//#include "spi_flash.h"
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#include <string.h>
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extern unsigned char SPI_WriteByte(unsigned char data);
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/********************** hardware *************************************/
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/* SPI_FLASH_CS PA4 */
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/* SPI_FLASH_RST PA3 */
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#define FLASH_RST_0() GPIO_ResetBits(GPIOA,GPIO_Pin_3)
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#define FLASH_RST_1() GPIO_SetBits(GPIOA,GPIO_Pin_3)
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#define FLASH_CS_0() GPIO_ResetBits(GPIOA,GPIO_Pin_4)
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#define FLASH_CS_1() GPIO_SetBits(GPIOA,GPIO_Pin_4)
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/********************** hardware *************************************/
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static void GPIO_Configuration(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA,ENABLE);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_3;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOA,&GPIO_InitStructure);
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FLASH_RST_0(); // RESET
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FLASH_RST_1();
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}
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static unsigned char SPI_HostReadByte(void)
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{
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return SPI_WriteByte(0x00);
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}
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static void SPI_HostWriteByte(unsigned char wByte)
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{
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SPI_WriteByte(wByte);
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}
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/******************************************************************************/
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/*Status Register Format: */
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/* ----------------------------------------------------------------------- */
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/* | bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 | */
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/* |--------|--------|--------|--------|--------|--------|--------|--------| */
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/* |RDY/BUSY| COMP | 0 | 1 | 1 | 1 | X | X | */
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/* ----------------------------------------------------------------------- */
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/* bit7 - æ<><C3A6><EFBFBD>ǣ<EFBFBD>0Ϊæ1Ϊ<31><CEAA>æ<EFBFBD><C3A6> */
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/* <20><>Status Register<65><72>λ0<CEBB>Ƴ<EFBFBD>֮<EFBFBD><EFBFBD><F3A3ACBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>н<EFBFBD>ʹSPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
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/* <20><><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD>״̬<D7B4>ֽ<EFBFBD><D6BD>ͳ<EFBFBD><CDB3><EFBFBD> */
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/* bit6 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>Main Memory Page<67><65>Buffer<65>ıȽϽ<C8BD><CFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><30>ͬ<EFBFBD><CDAC>1<EFBFBD><31>ͬ<EFBFBD><CDAC> */
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/* bit5 */
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/* bit4 */
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/* bit3 */
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/* bit2 - <20><>4λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܶȣ<DCB6><C8A3><EFBFBD><EFBFBD><EFBFBD>AT45DB041B<31><42><EFBFBD><EFBFBD>4λӦ<CEBB><D3A6><EFBFBD><EFBFBD>0111<31><31>һ<EFBFBD><D2BB><EFBFBD>ܱ<EFBFBD><DCB1><EFBFBD> */
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/* 16<31>ֲ<EFBFBD>ͬ<EFBFBD>ܶȵ<DCB6><C8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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/* bit1 */
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/* bit0 - <20><>2λ<32><CEBB>ʱ<EFBFBD><CAB1>Ч */
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/******************************************************************************/
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static unsigned char AT45DB_StatusRegisterRead(void)
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{
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unsigned char i;
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FLASH_CS_0();
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SPI_HostWriteByte(0xd7);
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i=SPI_HostReadByte();
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FLASH_CS_1();
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return i;
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}
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static void wait_busy(void)
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{
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unsigned int i=0;
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while (i++<255)
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{
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if (AT45DB_StatusRegisterRead()&0x80)
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{
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break;
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}
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}
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}
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static void read_page(unsigned int page,unsigned char * pHeader)
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{
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unsigned int i=0;
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wait_busy();
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FLASH_CS_0();
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SPI_HostWriteByte(0x53);
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SPI_HostWriteByte((unsigned char)(page >> 6));
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SPI_HostWriteByte((unsigned char)(page << 2));
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SPI_HostWriteByte(0x00);
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FLASH_CS_1();
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wait_busy();
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FLASH_CS_0();
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SPI_HostWriteByte(0xD4);
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SPI_HostWriteByte(0x00);
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SPI_HostWriteByte(0x00);
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SPI_HostWriteByte(0x00);
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SPI_HostWriteByte(0x00);
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for (i=0; i<512; i++)
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{
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*pHeader++ = SPI_HostReadByte();
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}
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FLASH_CS_1();
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}
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static void write_page(unsigned int page,unsigned char * pHeader)
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{
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unsigned int i;
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wait_busy();
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FLASH_CS_0();
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SPI_HostWriteByte(0x87);
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SPI_HostWriteByte(0);
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SPI_HostWriteByte(0);
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SPI_HostWriteByte(0);
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for(i=0; i<512; i++)
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{
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SPI_HostWriteByte(*pHeader++);
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}
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FLASH_CS_1();
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wait_busy();
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FLASH_CS_0();
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SPI_HostWriteByte(0x86);
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SPI_HostWriteByte((unsigned char)(page>>6));
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SPI_HostWriteByte((unsigned char)(page<<2));
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SPI_HostWriteByte(0x00);
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FLASH_CS_1();
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}
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#include <rtthread.h>
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/* SPI DEVICE */
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static struct rt_device spi_flash_device;
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/* RT-Thread Device Driver Interface */
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static rt_err_t rt_spi_flash_init(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t rt_spi_flash_open(rt_device_t dev, rt_uint16_t oflag)
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{
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return RT_EOK;
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}
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static rt_err_t rt_spi_flash_close(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t rt_spi_flash_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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return RT_EOK;
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}
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static rt_size_t rt_spi_flash_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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/* only supply single block read: block size 512Byte */
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read_page(pos/512,buffer);
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return RT_EOK;
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}
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static rt_size_t rt_spi_flash_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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{
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/* only supply single block write: block size 512Byte */
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write_page(pos/512,(unsigned char*)buffer);
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return RT_EOK;
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}
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void rt_hw_spi_flash_init(void)
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{
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GPIO_Configuration();
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/* register spi_flash device */
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spi_flash_device.init = rt_spi_flash_init;
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spi_flash_device.open = rt_spi_flash_open;
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spi_flash_device.close = rt_spi_flash_close;
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spi_flash_device.read = rt_spi_flash_read;
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spi_flash_device.write = rt_spi_flash_write;
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spi_flash_device.control = rt_spi_flash_control;
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/* no private */
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spi_flash_device.private = RT_NULL;
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rt_device_register(&spi_flash_device, "spi0",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
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}
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