532 lines
15 KiB
C
532 lines
15 KiB
C
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#include "ssd1289.h"
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// Compatible list:
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// ssd1289
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#ifdef __CC_ARM /* ARM Compiler */
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#define lcd_inline static __inline
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#elif defined (__ICCARM__) /* for IAR Compiler */
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#define lcd_inline inline
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#elif defined (__GNUC__) /* GNU GCC Compiler */
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#define lcd_inline static __inline
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#else
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#define lcd_inline static
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#endif
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#define rw_data_prepare() write_cmd(34)
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/********* control ***********/
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#include "stm32f10x.h"
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#include "board.h"
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//<2F><><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>.<2E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>ʱ.
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#define printf rt_kprintf //ʹ<><CAB9>rt_kprintf<74><66><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//#define printf(...) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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/* LCD is connected to the FSMC_Bank1_NOR/SRAM2 and NE2 is used as ship select signal */
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/* RS <==> A2 */
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#define LCD_REG (*((volatile unsigned short *) 0x64000000)) /* RS = 0 */
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#define LCD_RAM (*((volatile unsigned short *) 0x64000008)) /* RS = 1 */
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static void LCD_FSMCConfig(void)
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{
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FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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FSMC_NORSRAMTimingInitTypeDef Timing_read,Timing_write;
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/* FSMC GPIO configure */
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF
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| RCC_APB2Periph_GPIOG, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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/*
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FSMC_D0 ~ FSMC_D3
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PD14 FSMC_D0 PD15 FSMC_D1 PD0 FSMC_D2 PD1 FSMC_D3
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*/
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOD,&GPIO_InitStructure);
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/*
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FSMC_D4 ~ FSMC_D12
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PE7 ~ PE15 FSMC_D4 ~ FSMC_D12
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*/
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10
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| GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOE,&GPIO_InitStructure);
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/* FSMC_D13 ~ FSMC_D15 PD8 ~ PD10 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
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GPIO_Init(GPIOD,&GPIO_InitStructure);
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/*
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FSMC_A0 ~ FSMC_A5 FSMC_A6 ~ FSMC_A9
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PF0 ~ PF5 PF12 ~ PF15
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*/
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3
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| GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOF,&GPIO_InitStructure);
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/* FSMC_A10 ~ FSMC_A15 PG0 ~ PG5 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOG,&GPIO_InitStructure);
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/* FSMC_A16 ~ FSMC_A18 PD11 ~ PD13 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
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GPIO_Init(GPIOD,&GPIO_InitStructure);
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/* RD-PD4 WR-PD5 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOD,&GPIO_InitStructure);
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/* NBL0-PE0 NBL1-PE1 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
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GPIO_Init(GPIOE,&GPIO_InitStructure);
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/* NE1/NCE2 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
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GPIO_Init(GPIOD,&GPIO_InitStructure);
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/* NE2 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
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GPIO_Init(GPIOG,&GPIO_InitStructure);
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/* NE3 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
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GPIO_Init(GPIOG,&GPIO_InitStructure);
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/* NE4 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
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GPIO_Init(GPIOG,&GPIO_InitStructure);
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}
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/* FSMC GPIO configure */
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/*-- FSMC Configuration -------------------------------------------------*/
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Timing_read.FSMC_AddressSetupTime = 30; /* <20><>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> */
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Timing_read.FSMC_DataSetupTime = 30; /* <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD>ʱ<EFBFBD><CAB1> */
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Timing_read.FSMC_AccessMode = FSMC_AccessMode_A; /* FSMC <20><><EFBFBD><EFBFBD>ģʽ */
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Timing_write.FSMC_AddressSetupTime = 3; /* <20><>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> */
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Timing_write.FSMC_DataSetupTime = 3; /* <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD>ʱ<EFBFBD><CAB1> */
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Timing_write.FSMC_AccessMode = FSMC_AccessMode_A; /* FSMC <20><><EFBFBD><EFBFBD>ģʽ */
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/* Color LCD configuration ------------------------------------
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LCD configured as follow:
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- Data/Address MUX = Disable
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- Memory Type = SRAM
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- Data Width = 16bit
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- Write Operation = Enable
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- Extended Mode = Enable
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- Asynchronous Wait = Disable */
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FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
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FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
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FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
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FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
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FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
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FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
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FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable;
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FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &Timing_read;
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FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &Timing_write;
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FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
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FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
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}
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static void delay(int cnt)
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{
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volatile unsigned int dl;
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while(cnt--)
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{
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for(dl=0; dl<500; dl++);
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}
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}
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static void lcd_port_init(void)
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{
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LCD_FSMCConfig();
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}
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lcd_inline void write_cmd(unsigned short cmd)
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{
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LCD_REG = cmd;
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}
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lcd_inline unsigned short read_data(void)
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{
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return LCD_RAM;
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}
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lcd_inline void write_data(unsigned short data_code )
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{
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LCD_RAM = data_code;
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}
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lcd_inline void write_reg(unsigned char reg_addr,unsigned short reg_val)
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{
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write_cmd(reg_addr);
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write_data(reg_val);
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}
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lcd_inline unsigned short read_reg(unsigned char reg_addr)
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{
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unsigned short val=0;
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write_cmd(reg_addr);
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val = read_data();
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return (val);
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}
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/********* control <ֻ<><D6BB>ֲ<EFBFBD><D6B2><EFBFBD>Ϻ<EFBFBD><CFBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>> ***********/
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static unsigned short deviceid=0;//<2F><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>LCD<43><44>ID
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//static unsigned short BGR2RGB(unsigned short c)
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//{
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// u16 r, g, b, rgb;
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//
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// b = (c>>0) & 0x1f;
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// g = (c>>5) & 0x3f;
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// r = (c>>11) & 0x1f;
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//
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// rgb = (b<<11) + (g<<5) + (r<<0);
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//
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// return( rgb );
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//}
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static void lcd_SetCursor(unsigned int x,unsigned int y)
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{
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write_reg(0x004e,x); /* 0-239 */
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write_reg(0x004f,y); /* 0-319 */
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}
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/* <20><>ȡָ<C8A1><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>GRAM */
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static unsigned short lcd_read_gram(unsigned int x,unsigned int y)
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{
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unsigned short temp;
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lcd_SetCursor(x,y);
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rw_data_prepare();
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/* dummy read */
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temp = read_data();
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temp = read_data();
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return temp;
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}
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static void lcd_clear(unsigned short Color)
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{
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unsigned int index=0;
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lcd_SetCursor(0,0);
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rw_data_prepare(); /* Prepare to write GRAM */
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for (index=0; index<(LCD_WIDTH*LCD_HEIGHT); index++)
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{
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write_data(Color);
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}
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}
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static void lcd_data_bus_test(void)
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{
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unsigned short temp1;
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unsigned short temp2;
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// /* [5:4]-ID~ID0 [3]-AM-1<><31>ֱ-0ˮƽ */
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// write_reg(0x0003,(1<<12)|(1<<5)|(1<<4) | (0<<3) );
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/* wirte */
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lcd_SetCursor(0,0);
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rw_data_prepare();
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write_data(0x5555);
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lcd_SetCursor(1,0);
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rw_data_prepare();
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write_data(0xAAAA);
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/* read */
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lcd_SetCursor(0,0);
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temp1 = lcd_read_gram(0,0);
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temp2 = lcd_read_gram(1,0);
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if( (temp1 == 0x5555) && (temp2 == 0xAAAA) )
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{
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printf(" data bus test pass!\r\n");
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}
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else
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{
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printf(" data bus test error: %04X %04X\r\n",temp1,temp2);
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}
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}
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static void lcd_gram_test(void)
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{
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unsigned short temp;
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unsigned int test_x;
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unsigned int test_y;
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printf(" LCD GRAM test....");
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/* write */
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temp=0;
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write_reg(0x0011,0x6030 | (0<<3)); // AM=0 hline
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lcd_SetCursor(0,0);
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rw_data_prepare();
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for(test_y=0; test_y<76800; test_y++)
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{
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write_data(temp);
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temp++;
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}/* write */
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/* read */
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temp=0;
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{
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for(test_y=0; test_y<320; test_y++)
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{
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for(test_x=0; test_x<240; test_x++)
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{
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if( lcd_read_gram(test_x,test_y) != temp++)
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{
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printf(" LCD GRAM ERR!!\r\n");
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return ;
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}
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}
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}
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printf(" TEST PASS!\r\n");
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}/* read */
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}
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void ssd1289_init(void)
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{
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lcd_port_init();
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deviceid = read_reg(0x00);
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/* deviceid check */
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if( deviceid != 0x8989 )
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{
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printf("Invalid LCD ID:%08X\r\n",deviceid);
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printf("Please check you hardware and configure.\r\n");
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}
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else
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{
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printf("\r\nLCD Device ID : %04X ",deviceid);
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}
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// power supply setting
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// set R07h at 0021h (GON=1,DTE=0,D[1:0]=01)
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write_reg(0x0007,0x0021);
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// set R00h at 0001h (OSCEN=1)
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write_reg(0x0000,0x0001);
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// set R07h at 0023h (GON=1,DTE=0,D[1:0]=11)
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write_reg(0x0007,0x0023);
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// set R10h at 0000h (Exit sleep mode)
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write_reg(0x0010,0x0000);
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// Wait 30ms
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delay(3000);
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// set R07h at 0033h (GON=1,DTE=1,D[1:0]=11)
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write_reg(0x0007,0x0033);
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// Entry mode setting (R11h)
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// R11H Entry mode
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// vsmode DFM1 DFM0 TRANS OEDef WMode DMode1 DMode0 TY1 TY0 ID1 ID0 AM LG2 LG2 LG0
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// 0 1 1 0 0 0 0 0 0 1 1 1 * 0 0 0
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write_reg(0x0011,0x6070);
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// LCD driver AC setting (R02h)
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write_reg(0x0002,0x0600);
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// power control 1
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// DCT3 DCT2 DCT1 DCT0 BT2 BT1 BT0 0 DC3 DC2 DC1 DC0 AP2 AP1 AP0 0
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// 1 0 1 0 1 0 0 0 1 0 1 0 0 1 0 0
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// DCT[3:0] fosc/4 BT[2:0] DC{3:0] fosc/4
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write_reg(0x0003,0x0804);//0xA8A4
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write_reg(0x000C,0x0000);//
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write_reg(0x000D,0x0808);// 0x080C --> 0x0808
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// power control 4
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// 0 0 VCOMG VDV4 VDV3 VDV2 VDV1 VDV0 0 0 0 0 0 0 0 0
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// 0 0 1 0 1 0 1 1 0 0 0 0 0 0 0 0
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write_reg(0x000E,0x2900);
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write_reg(0x001E,0x00B8);
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write_reg(0x0001,0x2B3F);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>320*240 0x6B3F
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write_reg(0x0010,0x0000);
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write_reg(0x0005,0x0000);
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write_reg(0x0006,0x0000);
|
|||
|
write_reg(0x0016,0xEF1C);
|
|||
|
write_reg(0x0017,0x0003);
|
|||
|
write_reg(0x0007,0x0233);//0x0233
|
|||
|
write_reg(0x000B,0x0000|(3<<6));
|
|||
|
write_reg(0x000F,0x0000);//ɨ<>迪ʼ<E8BFAA><CABC>ַ
|
|||
|
write_reg(0x0041,0x0000);
|
|||
|
write_reg(0x0042,0x0000);
|
|||
|
write_reg(0x0048,0x0000);
|
|||
|
write_reg(0x0049,0x013F);
|
|||
|
write_reg(0x004A,0x0000);
|
|||
|
write_reg(0x004B,0x0000);
|
|||
|
write_reg(0x0044,0xEF00);
|
|||
|
write_reg(0x0045,0x0000);
|
|||
|
write_reg(0x0046,0x013F);
|
|||
|
write_reg(0x0030,0x0707);
|
|||
|
write_reg(0x0031,0x0204);
|
|||
|
write_reg(0x0032,0x0204);
|
|||
|
write_reg(0x0033,0x0502);
|
|||
|
write_reg(0x0034,0x0507);
|
|||
|
write_reg(0x0035,0x0204);
|
|||
|
write_reg(0x0036,0x0204);
|
|||
|
write_reg(0x0037,0x0502);
|
|||
|
write_reg(0x003A,0x0302);
|
|||
|
write_reg(0x003B,0x0302);
|
|||
|
write_reg(0x0023,0x0000);
|
|||
|
write_reg(0x0024,0x0000);
|
|||
|
write_reg(0x0025,0x8000); // 65hz
|
|||
|
write_reg(0x004f,0); // <20><><EFBFBD><EFBFBD>ַ0
|
|||
|
write_reg(0x004e,0); // <20><><EFBFBD><EFBFBD>ַ0
|
|||
|
|
|||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߲<EFBFBD><DFB2><EFBFBD>,<2C><><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD>.
|
|||
|
lcd_data_bus_test();
|
|||
|
//GRAM<41><4D><EFBFBD><EFBFBD>,<2C>˲<EFBFBD><CBB2>Կ<EFBFBD><D4BF>Բ<EFBFBD><D4B2><EFBFBD>LCD<43><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>GRAM.<2E><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>֤Ӳ<D6A4><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
// lcd_gram_test();
|
|||
|
|
|||
|
//<2F><><EFBFBD><EFBFBD>
|
|||
|
lcd_clear( Blue );
|
|||
|
}
|
|||
|
|
|||
|
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD> <20><>ɫ,X,Y */
|
|||
|
void ssd1289_lcd_set_pixel(const char* pixel, int x, int y)
|
|||
|
{
|
|||
|
lcd_SetCursor(x,y);
|
|||
|
|
|||
|
rw_data_prepare();
|
|||
|
write_data(*(rt_uint16_t*)pixel);
|
|||
|
}
|
|||
|
|
|||
|
/* <20><>ȡ<EFBFBD><C8A1><EFBFBD>ص<EFBFBD><D8B5><EFBFBD>ɫ */
|
|||
|
void ssd1289_lcd_get_pixel(char* pixel, int x, int y)
|
|||
|
{
|
|||
|
*(rt_uint16_t*)pixel = lcd_read_gram(x, y);
|
|||
|
}
|
|||
|
|
|||
|
/* <20><>ˮƽ<CBAE><C6BD> */
|
|||
|
void ssd1289_lcd_draw_hline(const char* pixel, int x1, int x2, int y)
|
|||
|
{
|
|||
|
/* [5:4]-ID~ID0 [3]-AM-1<><31>ֱ-0ˮƽ */
|
|||
|
write_reg(0x0011,0x6030 | (0<<3)); // AM=0 hline
|
|||
|
|
|||
|
lcd_SetCursor(x1, y);
|
|||
|
rw_data_prepare(); /* Prepare to write GRAM */
|
|||
|
while (x1 < x2)
|
|||
|
{
|
|||
|
write_data(*(rt_uint16_t*)pixel);
|
|||
|
x1++;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/* <20><>ֱ<EFBFBD><D6B1> */
|
|||
|
void ssd1289_lcd_draw_vline(const char* pixel, int x, int y1, int y2)
|
|||
|
{
|
|||
|
/* [5:4]-ID~ID0 [3]-AM-1<><31>ֱ-0ˮƽ */
|
|||
|
write_reg(0x0011,0x6070 | (1<<3)); // AM=0 vline
|
|||
|
|
|||
|
lcd_SetCursor(x, y1);
|
|||
|
rw_data_prepare(); /* Prepare to write GRAM */
|
|||
|
while (y1 < y2)
|
|||
|
{
|
|||
|
write_data(*(rt_uint16_t*)pixel);
|
|||
|
y1++;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/* blit a line */
|
|||
|
void ssd1289_lcd_blit_line(const char* pixels, int x, int y, rt_size_t size)
|
|||
|
{
|
|||
|
rt_uint16_t *ptr;
|
|||
|
|
|||
|
ptr = (rt_uint16_t*)pixels;
|
|||
|
|
|||
|
/* [5:4]-ID~ID0 [3]-AM-1<><31>ֱ-0ˮƽ */
|
|||
|
write_reg(0x0011,0x6070 | (0<<3)); // AM=0 hline
|
|||
|
|
|||
|
lcd_SetCursor(x, y);
|
|||
|
rw_data_prepare(); /* Prepare to write GRAM */
|
|||
|
while (size)
|
|||
|
{
|
|||
|
write_data(*ptr ++);
|
|||
|
size --;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
struct rt_device_graphic_ops ssd1289_ops =
|
|||
|
{
|
|||
|
ssd1289_lcd_set_pixel,
|
|||
|
ssd1289_lcd_get_pixel,
|
|||
|
ssd1289_lcd_draw_hline,
|
|||
|
ssd1289_lcd_draw_vline,
|
|||
|
ssd1289_lcd_blit_line
|
|||
|
};
|
|||
|
|
|||
|
struct rt_device _lcd_device;
|
|||
|
static rt_err_t lcd_init(rt_device_t dev)
|
|||
|
{
|
|||
|
return RT_EOK;
|
|||
|
}
|
|||
|
|
|||
|
static rt_err_t lcd_open(rt_device_t dev, rt_uint16_t oflag)
|
|||
|
{
|
|||
|
return RT_EOK;
|
|||
|
}
|
|||
|
|
|||
|
static rt_err_t lcd_close(rt_device_t dev)
|
|||
|
{
|
|||
|
return RT_EOK;
|
|||
|
}
|
|||
|
|
|||
|
static rt_err_t lcd_control(rt_device_t dev, rt_uint8_t cmd, void *args)
|
|||
|
{
|
|||
|
switch (cmd)
|
|||
|
{
|
|||
|
case RTGRAPHIC_CTRL_GET_INFO:
|
|||
|
{
|
|||
|
struct rt_device_graphic_info *info;
|
|||
|
|
|||
|
info = (struct rt_device_graphic_info*) args;
|
|||
|
RT_ASSERT(info != RT_NULL);
|
|||
|
|
|||
|
info->bits_per_pixel = 16;
|
|||
|
info->pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
|
|||
|
info->framebuffer = RT_NULL;
|
|||
|
info->width = 240;
|
|||
|
info->height = 320;
|
|||
|
}
|
|||
|
break;
|
|||
|
|
|||
|
case RTGRAPHIC_CTRL_RECT_UPDATE:
|
|||
|
/* nothong to be done */
|
|||
|
break;
|
|||
|
|
|||
|
default:
|
|||
|
break;
|
|||
|
}
|
|||
|
|
|||
|
return RT_EOK;
|
|||
|
}
|
|||
|
|
|||
|
void rt_hw_lcd_init(void)
|
|||
|
{
|
|||
|
extern struct rt_device_graphic_ops ssd1289_ops;
|
|||
|
|
|||
|
/* register lcd device */
|
|||
|
_lcd_device.type = RT_Device_Class_Graphic;
|
|||
|
_lcd_device.init = lcd_init;
|
|||
|
_lcd_device.open = lcd_open;
|
|||
|
_lcd_device.close = lcd_close;
|
|||
|
_lcd_device.control = lcd_control;
|
|||
|
_lcd_device.read = RT_NULL;
|
|||
|
_lcd_device.write = RT_NULL;
|
|||
|
|
|||
|
_lcd_device.user_data = &ssd1289_ops;
|
|||
|
ssd1289_init();
|
|||
|
|
|||
|
/* register graphic device driver */
|
|||
|
rt_device_register(&_lcd_device, "lcd",
|
|||
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
|
|||
|
}
|
|||
|
|