442 lines
16 KiB
C
442 lines
16 KiB
C
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/**
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******************************************************************************
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* @file stm32l0xx_hal.h
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* @author MCD Application Team
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* @version V1.7.0
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* @date 31-May-2016
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* @brief This file contains all the functions prototypes for the HAL
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* module driver.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L0xx_HAL_H
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#define __STM32L0xx_HAL_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l0xx_hal_conf.h"
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/** @addtogroup STM32L0xx_HAL_Driver
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* @{
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*/
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/** @defgroup HAL HAL
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* @{
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*/
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/** @defgroup HAL_Exported_Constants HAL Exported Constants
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* @{
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*/
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/** @defgroup SYSCFG_BootMode Boot Mode
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* @{
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*/
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#define SYSCFG_BOOT_MAINFLASH ((uint32_t)0x00000000U)
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#define SYSCFG_BOOT_SYSTEMFLASH ((uint32_t)SYSCFG_CFGR1_BOOT_MODE_0)
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#define SYSCFG_BOOT_SRAM ((uint32_t)SYSCFG_CFGR1_BOOT_MODE)
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/**
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* @}
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*/
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/** @defgroup DBGMCU_Low_Power_Config DBGMCU Low Power Configuration
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* @{
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*/
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#define DBGMCU_SLEEP DBGMCU_CR_DBG_SLEEP
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#define DBGMCU_STOP DBGMCU_CR_DBG_STOP
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#define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY
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#define IS_DBGMCU_PERIPH(__PERIPH__) ((((__PERIPH__) & (~(DBGMCU_CR_DBG))) == 0x00U) && ((__PERIPH__) != 0x00U))
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/**
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* @}
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*/
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#if defined (LCD_BASE) /* STM32L0x3xx only */
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/** @defgroup SYSCFG_LCD_EXT_CAPA SYSCFG LCD External Capacitors
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* @{
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*/
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#define SYSCFG_LCD_EXT_CAPA SYSCFG_CFGR2_CAPA /*!< Connection of internal Vlcd rail to external capacitors */
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#define SYSCFG_VLCD_PB2_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_0 /*!< Connection on PB2 */
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#define SYSCFG_VLCD_PB12_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_1 /*!< Connection on PB12 */
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#define SYSCFG_VLCD_PB0_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_2 /*!< Connection on PB0 */
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#if defined (SYSCFG_CFGR2_CAPA_3)
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#define SYSCFG_VLCD_PE11_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_3 /*!< Connection on PE11 */
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#endif
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#if defined (SYSCFG_CFGR2_CAPA_4)
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#define SYSCFG_VLCD_PE12_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_4 /*!< Connection on PE12 */
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#endif
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/**
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* @}
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*/
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#endif
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/** @defgroup SYSCFG_VREFINT_OUT_SELECT SYSCFG VREFINT Out Selection
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* @{
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*/
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#define SYSCFG_VREFINT_OUT_NONE ((uint32_t)0x00000000U) /* no pad connected */
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#define SYSCFG_VREFINT_OUT_PB0 SYSCFG_CFGR3_VREF_OUT_0 /* Selects PBO as output for the Vrefint */
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#define SYSCFG_VREFINT_OUT_PB1 SYSCFG_CFGR3_VREF_OUT_1 /* Selects PB1 as output for the Vrefint */
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#define SYSCFG_VREFINT_OUT_PB0_PB1 SYSCFG_CFGR3_VREF_OUT /* Selects PBO and PB1 as output for the Vrefint */
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#define IS_SYSCFG_VREFINT_OUT_SELECT(OUTPUT) (((OUTPUT) == SYSCFG_VREFINT_OUT_NONE) || \
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((OUTPUT) == SYSCFG_VREFINT_OUT_PB0) || \
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((OUTPUT) == SYSCFG_VREFINT_OUT_PB1) || \
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((OUTPUT) == SYSCFG_VREFINT_OUT_PB0_PB1))
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/**
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* @}
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*/
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/** @defgroup SYSCFG_flags_definition SYSCFG Flags Definition
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* @{
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*/
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#define SYSCFG_FLAG_VREFINT_READY SYSCFG_CFGR3_VREFINT_RDYF
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#define IS_SYSCFG_FLAG(FLAG) ((FLAG) == SYSCFG_FLAG_VREFINT_READY))
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/**
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* @}
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*/
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/** @defgroup SYSCFG_FastModePlus_GPIO Fast Mode Plus on GPIO
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* @{
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*/
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/** @brief Fast mode Plus driving capability on a specific GPIO
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*/
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#if defined (SYSCFG_CFGR2_I2C_PB6_FMP)
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#define SYSCFG_FASTMODEPLUS_PB6 SYSCFG_CFGR2_I2C_PB6_FMP /* Enable Fast Mode Plus on PB6 */
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#endif
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#if defined (SYSCFG_CFGR2_I2C_PB7_FMP)
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#define SYSCFG_FASTMODEPLUS_PB7 SYSCFG_CFGR2_I2C_PB7_FMP /* Enable Fast Mode Plus on PB7 */
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#endif
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#if defined (SYSCFG_CFGR2_I2C_PB8_FMP)
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#define SYSCFG_FASTMODEPLUS_PB8 SYSCFG_CFGR2_I2C_PB8_FMP /* Enable Fast Mode Plus on PB8 */
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#endif
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#if defined (SYSCFG_CFGR2_I2C_PB9_FMP)
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#define SYSCFG_FASTMODEPLUS_PB9 SYSCFG_CFGR2_I2C_PB9_FMP /* Enable Fast Mode Plus on PB9 */
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#endif
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#define IS_SYSCFG_FASTMODEPLUS(PIN) ((((PIN) & (SYSCFG_FASTMODEPLUS_PB6)) == SYSCFG_FASTMODEPLUS_PB6) || \
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(((PIN) & (SYSCFG_FASTMODEPLUS_PB7)) == SYSCFG_FASTMODEPLUS_PB7) || \
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(((PIN) & (SYSCFG_FASTMODEPLUS_PB8)) == SYSCFG_FASTMODEPLUS_PB8) || \
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(((PIN) & (SYSCFG_FASTMODEPLUS_PB9)) == SYSCFG_FASTMODEPLUS_PB9) )
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/**
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* @}
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*/
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/**
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* @}
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*/
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/** @defgroup HAL_Exported_Macros HAL Exported Macros
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* @{
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*/
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/** @brief Freeze/Unfreeze Peripherals in Debug mode
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*/
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#if defined (DBGMCU_APB1_FZ_DBG_TIM2_STOP)
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/**
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* @brief TIM2 Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP)
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#define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP)
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#endif
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#if defined (DBGMCU_APB1_FZ_DBG_TIM3_STOP)
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/**
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* @brief TIM3 Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP)
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#define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP)
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#endif
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#if defined (DBGMCU_APB1_FZ_DBG_TIM6_STOP)
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/**
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* @brief TIM6 Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
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#define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
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#endif
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#if defined (DBGMCU_APB1_FZ_DBG_TIM7_STOP)
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/**
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* @brief TIM7 Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
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#define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
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#endif
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#if defined (DBGMCU_APB1_FZ_DBG_RTC_STOP)
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/**
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* @brief RTC Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
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#define __HAL_DBGMCU_UNFREEZE_RTC() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
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#endif
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#if defined (DBGMCU_APB1_FZ_DBG_WWDG_STOP)
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/**
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* @brief WWDG Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
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#define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
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#endif
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#if defined (DBGMCU_APB1_FZ_DBG_IWDG_STOP)
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/**
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* @brief IWDG Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
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#define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
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#endif
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#if defined (DBGMCU_APB1_FZ_DBG_I2C1_STOP)
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/**
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* @brief I2C1 Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP)
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#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP)
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#endif
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#if defined (DBGMCU_APB1_FZ_DBG_I2C2_STOP)
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/**
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* @brief I2C2 Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP)
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#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP)
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#endif
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#if defined (DBGMCU_APB1_FZ_DBG_I2C3_STOP)
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/**
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* @brief I2C3 Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP)
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#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP)
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#endif
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#if defined (DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
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/**
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* @brief LPTIMER Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_LPTIMER() SET_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
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#define __HAL_DBGMCU_UNFREEZE_LPTIMER() CLEAR_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
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#endif
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#if defined (DBGMCU_APB2_FZ_DBG_TIM22_STOP)
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/**
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* @brief TIM22 Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_TIM22() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP)
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#define __HAL_DBGMCU_UNFREEZE_TIM22() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP)
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#endif
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#if defined (DBGMCU_APB2_FZ_DBG_TIM21_STOP)
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/**
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* @brief TIM21 Peripherals Debug mode
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*/
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#define __HAL_DBGMCU_FREEZE_TIM21() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP)
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#define __HAL_DBGMCU_UNFREEZE_TIM21() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP)
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#endif
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/** @brief Main Flash memory mapped at 0x00000000
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*/
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#define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
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/** @brief System Flash memory mapped at 0x00000000
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*/
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#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0)
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/** @brief Embedded SRAM mapped at 0x00000000
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*/
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#define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1)
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/** @brief Configuration of the DBG Low Power mode.
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* @param __DBGLPMODE__: bit field to indicate in wich Low Power mode DBG is still active.
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* This parameter can be a value of
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* - DBGMCU_SLEEP
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* - DBGMCU_STOP
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* - DBGMCU_STANDBY
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*/
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#define __HAL_SYSCFG_DBG_LP_CONFIG(__DBGLPMODE__) do {assert_param(IS_DBGMCU_PERIPH(__DBGLPMODE__)); \
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MODIFY_REG(DBGMCU->CR, DBGMCU_CR_DBG, (__DBGLPMODE__)); \
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} while (0)
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#if defined (LCD_BASE) /* STM32L0x3xx only */
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/** @brief Macro to configure the VLCD Decoupling capacitance connection.
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*
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* @param __SYSCFG_VLCD_CAPA__: specifies the decoupling of LCD capacitance for rails connection on GPIO.
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* This parameter can be a combination of following values (when available):
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* @arg SYSCFG_VLCD_PB2_EXT_CAPA_ON: Connection on PB2
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* @arg SYSCFG_VLCD_PB12_EXT_CAPA_ON: Connection on PB12
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* @arg SYSCFG_VLCD_PB0_EXT_CAPA_ON: Connection on PB0
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* @arg SYSCFG_VLCD_PE11_EXT_CAPA_ON: Connection on PE11
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* @arg SYSCFG_VLCD_PE12_EXT_CAPA_ON: Connection on PE12
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* @retval None
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||
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|
*/
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#define __HAL_SYSCFG_VLCD_CAPA_CONFIG(__SYSCFG_VLCD_CAPA__) \
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MODIFY_REG(SYSCFG->CFGR2, SYSCFG_LCD_EXT_CAPA, (uint32_t)(__SYSCFG_VLCD_CAPA__))
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|
|
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/**
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* @brief Returns the decoupling of LCD capacitance configured by user.
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* @retval The LCD capacitance connection as configured by user. The returned can be a combination of :
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||
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* SYSCFG_VLCD_PB2_EXT_CAPA_ON: Connection on PB2
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||
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|
* SYSCFG_VLCD_PB12_EXT_CAPA_ON: Connection on PB12
|
||
|
|
* SYSCFG_VLCD_PB0_EXT_CAPA_ON: Connection on PB0
|
||
|
|
* SYSCFG_VLCD_PE11_EXT_CAPA_ON: Connection on PE11
|
||
|
|
* SYSCFG_VLCD_PE12_EXT_CAPA_ON: Connection on PE12
|
||
|
|
*/
|
||
|
|
#define __HAL_SYSCFG_GET_VLCD_CAPA_CONFIG() READ_BIT(SYSCFG->CFGR2, SYSCFG_LCD_EXT_CAPA)
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||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Returns the boot mode as configured by user.
|
||
|
|
* @retval The boot mode as configured by user. The returned can be a value of :
|
||
|
|
* - SYSCFG_BOOT_MAINFLASH
|
||
|
|
* - SYSCFG_BOOT_SYSTEMFLASH
|
||
|
|
* - SYSCFG_BOOT_SRAM
|
||
|
|
*/
|
||
|
|
#define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE)
|
||
|
|
|
||
|
|
|
||
|
|
/** @brief Check whether the specified SYSCFG flag is set or not.
|
||
|
|
* @param __FLAG__: specifies the flag to check.
|
||
|
|
* The only parameter supported is SYSCFG_FLAG_VREFINT_READY
|
||
|
|
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||
|
|
*/
|
||
|
|
#define __HAL_SYSCFG_GET_FLAG(__FLAG__) (((SYSCFG->CFGR3) & (__FLAG__)) == (__FLAG__))
|
||
|
|
|
||
|
|
/** @brief Fast mode Plus driving capability enable macro
|
||
|
|
* @param __FASTMODEPLUS__: This parameter can be a value of :
|
||
|
|
* @arg SYSCFG_FASTMODEPLUS_PB6
|
||
|
|
* @arg SYSCFG_FASTMODEPLUS_PB7
|
||
|
|
* @arg SYSCFG_FASTMODEPLUS_PB8
|
||
|
|
* @arg SYSCFG_FASTMODEPLUS_PB9
|
||
|
|
*/
|
||
|
|
#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__))); \
|
||
|
|
SET_BIT(SYSCFG->CFGR2, __FASTMODEPLUS__); \
|
||
|
|
}while(0)
|
||
|
|
/** @brief Fast mode Plus driving capability disable macro
|
||
|
|
* @param __FASTMODEPLUS__: This parameter can be a value of :
|
||
|
|
* @arg SYSCFG_FASTMODEPLUS_PB6
|
||
|
|
* @arg SYSCFG_FASTMODEPLUS_PB7
|
||
|
|
* @arg SYSCFG_FASTMODEPLUS_PB8
|
||
|
|
* @arg SYSCFG_FASTMODEPLUS_PB9
|
||
|
|
*/
|
||
|
|
#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__))); \
|
||
|
|
CLEAR_BIT(SYSCFG->CFGR2, __FASTMODEPLUS__); \
|
||
|
|
}while(0)
|
||
|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/** @defgroup HAL_Exported_Functions HAL Exported Functions
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
/** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization functions
|
||
|
|
* @brief Initialization and de-initialization functions
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
HAL_StatusTypeDef HAL_Init(void);
|
||
|
|
HAL_StatusTypeDef HAL_DeInit(void);
|
||
|
|
void HAL_MspInit(void);
|
||
|
|
void HAL_MspDeInit(void);
|
||
|
|
HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/** @defgroup HAL_Exported_Functions_Group2 Peripheral Control functions
|
||
|
|
* @brief Peripheral Control functions
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
void HAL_IncTick(void);
|
||
|
|
void HAL_Delay(__IO uint32_t Delay);
|
||
|
|
uint32_t HAL_GetTick(void);
|
||
|
|
void HAL_SuspendTick(void);
|
||
|
|
void HAL_ResumeTick(void);
|
||
|
|
uint32_t HAL_GetHalVersion(void);
|
||
|
|
uint32_t HAL_GetREVID(void);
|
||
|
|
uint32_t HAL_GetDEVID(void);
|
||
|
|
void HAL_DBGMCU_EnableDBGSleepMode(void);
|
||
|
|
void HAL_DBGMCU_DisableDBGSleepMode(void);
|
||
|
|
void HAL_DBGMCU_EnableDBGStopMode(void);
|
||
|
|
void HAL_DBGMCU_DisableDBGStopMode(void);
|
||
|
|
void HAL_DBGMCU_EnableDBGStandbyMode(void);
|
||
|
|
void HAL_DBGMCU_DisableDBGStandbyMode(void);
|
||
|
|
void HAL_DBGMCU_DBG_EnableLowPowerConfig(uint32_t Periph);
|
||
|
|
void HAL_DBGMCU_DBG_DisableLowPowerConfig(uint32_t Periph);
|
||
|
|
uint32_t HAL_SYSCFG_GetBootMode(void);
|
||
|
|
void HAL_SYSCFG_Enable_Lock_VREFINT(void);
|
||
|
|
void HAL_SYSCFG_Disable_Lock_VREFINT(void);
|
||
|
|
void HAL_SYSCFG_VREFINT_OutputSelect(uint32_t SYSCFG_Vrefint_OUTPUT);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/* Define the private group ***********************************/
|
||
|
|
/**************************************************************/
|
||
|
|
/** @defgroup HAL_Private HAL Private
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
/**************************************************************/
|
||
|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* __STM32L0xx_HAL_H */
|
||
|
|
|
||
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|