2015-09-04 21:58:08 +08:00
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/*
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* File : psc.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2010-11-13 weety first version
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*/
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2015-09-04 12:30:20 +08:00
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#ifndef __DM36X_PSC_H
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#define __DM36X_PSC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* PSC register offsets */
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#define EPCPR 0x070
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#define PTCMD 0x120
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#define PTSTAT 0x128
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#define PDSTAT 0x200
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#define PDCTL1 0x304
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#define MDSTAT(n) (0x800 + (n) * 4)
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#define MDCTL(n) (0xA00 + (n) * 4)
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/* Power and Sleep Controller (PSC) Domains */
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#define DAVINCI_GPSC_ARMDOMAIN 0
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#define DAVINCI_GPSC_DSPDOMAIN 1
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#define DAVINCI_DM365_LPSC_TPCC 0
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#define DAVINCI_DM365_LPSC_TPTC0 1
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#define DAVINCI_DM365_LPSC_TPTC1 2
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#define DAVINCI_DM365_LPSC_TPTC2 3
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#define DAVINCI_DM365_LPSC_TPTC3 4
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#define DAVINCI_DM365_LPSC_TIMER3 5
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#define DAVINCI_DM365_LPSC_SPI1 6
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#define DAVINCI_DM365_LPSC_MMC_SD1 7
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#define DAVINCI_DM365_LPSC_McBSP 8
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#define DAVINCI_DM365_LPSC_USB 9
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#define DAVINCI_DM365_LPSC_PWM3 10
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#define DAVINCI_DM365_LPSC_SPI2 11
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#define DAVINCI_DM365_LPSC_RTO 12
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#define DAVINCI_DM365_LPSC_DDR_EMIF 13
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#define DAVINCI_DM365_LPSC_AEMIF 14
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#define DAVINCI_DM365_LPSC_MMC_SD 15
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#define DAVINCI_DM365_LPSC_MMC_SD0 15
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#define DAVINCI_DM365_LPSC_MEMSTICK 16
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#define DAVINCI_DM365_LPSC_TIMER4 17
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#define DAVINCI_DM365_LPSC_I2C 18
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#define DAVINCI_DM365_LPSC_UART0 19
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#define DAVINCI_DM365_LPSC_UART1 20
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#define DAVINCI_DM365_LPSC_UHPI 21
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#define DAVINCI_DM365_LPSC_SPI0 22
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#define DAVINCI_DM365_LPSC_PWM0 23
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#define DAVINCI_DM365_LPSC_PWM1 24
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#define DAVINCI_DM365_LPSC_PWM2 25
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#define DAVINCI_DM365_LPSC_GPIO 26
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#define DAVINCI_DM365_LPSC_TIMER0 27
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#define DAVINCI_DM365_LPSC_TIMER1 28
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#define DAVINCI_DM365_LPSC_TIMER2 29
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#define DAVINCI_DM365_LPSC_SYSTEM_SUBSYS 30
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#define DAVINCI_DM365_LPSC_ARM 31
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#define DAVINCI_DM365_LPSC_SCR0 33
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#define DAVINCI_DM365_LPSC_SCR1 34
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#define DAVINCI_DM365_LPSC_EMU 35
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#define DAVINCI_DM365_LPSC_CHIPDFT 36
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#define DAVINCI_DM365_LPSC_PBIST 37
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#define DAVINCI_DM365_LPSC_SPI3 38
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#define DAVINCI_DM365_LPSC_SPI4 39
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#define DAVINCI_DM365_LPSC_CPGMAC 40
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#define DAVINCI_DM365_LPSC_RTC 41
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#define DAVINCI_DM365_LPSC_KEYSCAN 42
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#define DAVINCI_DM365_LPSC_ADCIF 43
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#define DAVINCI_DM365_LPSC_VOICE_CODEC 44
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#define DAVINCI_DM365_LPSC_DAC_CLKRES 45
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#define DAVINCI_DM365_LPSC_DAC_CLK 46
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#define DAVINCI_DM365_LPSC_VPSSMSTR 47
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#define DAVINCI_DM365_LPSC_IMCOP 50
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#define DAVINCI_DM365_LPSC_KALEIDO 51
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#define PSC_ENABLE 3
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#define PSC_DISABLE 2
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#define PSC_SYNCRESET 1
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#define PSC_RESET 0
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void psc_change_state(int id, int state);
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#ifdef __cplusplus
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}
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#endif
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#endif
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