2013-01-08 22:40:58 +08:00
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/*
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* File : usart.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard the first version
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* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
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* 2012-02-08 aozima update for F4.
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*/
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#include "stm32f4xx.h"
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#include "usart.h"
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#include "board.h"
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#include <serial.h>
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/*
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* Use UART1 as console output and finsh input
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* interrupt Rx and poll Tx (stream mode)
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*
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* Use UART2 with interrupt Rx and poll Tx
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* Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
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*
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* USART DMA setting on STM32
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* USART1 Tx --> DMA Channel 4
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* USART1 Rx --> DMA Channel 5
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* USART2 Tx --> DMA Channel 7
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* USART2 Rx --> DMA Channel 6
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* USART3 Tx --> DMA Channel 2
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* USART3 Rx --> DMA Channel 3
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*/
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#ifdef RT_USING_UART1
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struct stm32_serial_int_rx uart1_int_rx;
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struct stm32_serial_device uart1 =
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{
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USART1,
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&uart1_int_rx,
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RT_NULL
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};
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struct rt_device uart1_device;
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#endif
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#ifdef RT_USING_UART2
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struct stm32_serial_int_rx uart2_int_rx;
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struct stm32_serial_device uart2 =
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{
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USART2,
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&uart2_int_rx,
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RT_NULL
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};
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struct rt_device uart2_device;
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#endif
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#ifdef RT_USING_UART3
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struct stm32_serial_int_rx uart3_int_rx;
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struct stm32_serial_dma_tx uart3_dma_tx;
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struct stm32_serial_device uart3 =
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{
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USART3,
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&uart3_int_rx,
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&uart3_dma_tx
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};
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struct rt_device uart3_device;
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#endif
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//#define USART1_DR_Base 0x40013804
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//#define USART2_DR_Base 0x40004404
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//#define USART3_DR_Base 0x40004804
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/* USART1_REMAP = 0 */
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#define UART1_GPIO_TX GPIO_Pin_9
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#define UART1_TX_PIN_SOURCE GPIO_PinSource9
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#define UART1_GPIO_RX GPIO_Pin_10
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#define UART1_RX_PIN_SOURCE GPIO_PinSource10
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#define UART1_GPIO GPIOA
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#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOA
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#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
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#define UART1_TX_DMA DMA1_Channel4
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#define UART1_RX_DMA DMA1_Channel5
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#define UART2_GPIO_TX GPIO_Pin_2
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#define UART2_TX_PIN_SOURCE GPIO_PinSource2
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#define UART2_GPIO_RX GPIO_Pin_3
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#define UART2_RX_PIN_SOURCE GPIO_PinSource3
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#define UART2_GPIO GPIOA
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#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
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#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
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/* USART3_REMAP[1:0] = 00 */
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#define UART3_GPIO_TX GPIO_Pin_10
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#define UART3_TX_PIN_SOURCE GPIO_PinSource10
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#define UART3_GPIO_RX GPIO_Pin_11
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#define UART3_RX_PIN_SOURCE GPIO_PinSource11
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#define UART3_GPIO GPIOB
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#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOB
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#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
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#define UART3_TX_DMA DMA1_Stream1
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#define UART3_RX_DMA DMA1_Stream3
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static void RCC_Configuration(void)
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{
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#ifdef RT_USING_UART1
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/* Enable USART2 GPIO clocks */
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RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE);
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/* Enable USART2 clock */
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RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE);
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#endif
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#ifdef RT_USING_UART2
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/* Enable USART2 GPIO clocks */
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RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE);
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/* Enable USART2 clock */
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RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE);
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#endif
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#ifdef RT_USING_UART3
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/* Enable USART3 GPIO clocks */
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RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE);
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/* Enable USART3 clock */
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RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
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/* DMA clock enable */
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RCC_APB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
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#endif
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}
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static void GPIO_Configuration(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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#ifdef RT_USING_UART1
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/* Configure USART1 Rx/tx PIN */
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GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX;
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GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
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/* Connect alternate function */
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GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1);
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GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PIN_SOURCE, GPIO_AF_USART1);
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#endif
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#ifdef RT_USING_UART2
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/* Configure USART2 Rx/tx PIN */
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GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX | UART2_GPIO_RX;
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GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
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/* Connect alternate function */
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GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2);
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GPIO_PinAFConfig(UART2_GPIO, UART2_RX_PIN_SOURCE, GPIO_AF_USART2);
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#endif
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#ifdef RT_USING_UART3
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/* Configure USART3 Rx/tx PIN */
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GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX | UART3_GPIO_RX;
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GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
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/* Connect alternate function */
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2014-04-25 16:10:41 +08:00
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GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
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GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3);
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2013-01-08 22:40:58 +08:00
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#endif
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}
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static void NVIC_Configuration(void)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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#ifdef RT_USING_UART1
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/* Enable the USART1 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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#endif
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#ifdef RT_USING_UART2
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/* Enable the USART2 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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#endif
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#ifdef RT_USING_UART3
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/* Enable the USART3 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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/* Enable the DMA1 Channel2 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream1_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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#endif
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}
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static void DMA_Configuration(void)
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{
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#if defined (RT_USING_UART3)
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DMA_InitTypeDef DMA_InitStructure;
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// /* Configure DMA Stream */
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// DMA_InitStructure.DMA_Channel = DMA_CHANNEL;
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// DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SRC_Const_Buffer;
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// DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)DST_Buffer;
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// DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToMemory;
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// DMA_InitStructure.DMA_BufferSize = (uint32_t)BUFFER_SIZE;
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// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable;
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// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
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// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
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// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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// DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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// DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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// DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
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// DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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// DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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// DMA_Init(DMA_STREAM, &DMA_InitStructure);
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/* Configure DMA Stream */
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DMA_InitStructure.DMA_Channel = DMA_Channel_0;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&USART3->DR);
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0;
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_BufferSize = (uint32_t)0;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_DeInit(UART3_TX_DMA);
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DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
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// /* fill init structure */
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// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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// DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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//
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// /* DMA1 Channel5 (triggered by USART3 Tx event) Config */
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// DMA_DeInit(UART3_TX_DMA);
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// DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
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// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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// DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
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// DMA_InitStructure.DMA_BufferSize = 0;
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// DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
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DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
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// DMA_ClearFlag(DMA1_FLAG_TC5);
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#endif
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}
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volatile USART_TypeDef * uart2_debug = USART2;
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/*
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* Init all related hardware in here
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* rt_hw_serial_init() will register all supported USART device
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*/
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void rt_hw_usart_init()
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{
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USART_InitTypeDef USART_InitStructure;
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RCC_Configuration();
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GPIO_Configuration();
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NVIC_Configuration();
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DMA_Configuration();
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/* uart init */
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#ifdef RT_USING_UART1
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USART_InitStructure.USART_BaudRate = 115200;
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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USART_InitStructure.USART_Parity = USART_Parity_No;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_Init(USART1, &USART_InitStructure);
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/* register uart1 */
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rt_hw_serial_register(&uart1_device, "uart1",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
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&uart1);
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/* enable interrupt */
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USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
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#endif
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#ifdef RT_USING_UART2
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USART_InitStructure.USART_BaudRate = 115200;
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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USART_InitStructure.USART_Parity = USART_Parity_No;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_Init(USART2, &USART_InitStructure);
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/* register uart2 */
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rt_hw_serial_register(&uart2_device, "uart2",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
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&uart2);
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/* Enable USART2 DMA Rx request */
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USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
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#endif
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#ifdef RT_USING_UART3
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USART_InitStructure.USART_BaudRate = 115200;
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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USART_InitStructure.USART_Parity = USART_Parity_No;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_Init(USART3, &USART_InitStructure);
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// uart3_dma_tx.dma_channel= UART3_TX_DMA;
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/* register uart3 */
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rt_hw_serial_register(&uart3_device, "uart3",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX,
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&uart3);
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/* Enable USART3 DMA Tx request */
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USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE);
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/* enable interrupt */
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USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
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#endif
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}
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