356 lines
8.2 KiB
C
356 lines
8.2 KiB
C
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/*
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* File : drv_reset.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2016<EFBFBD><EFBFBD>7<EFBFBD><EFBFBD>29<EFBFBD><EFBFBD> Urey the first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <finsh.h>
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#include "board.h"
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#include "drv_clock.h"
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#include "drv_ost.h"
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#include "drv_pmu.h"
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#include "drv_rtc.h"
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static void udelay(uint32_t x)
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{
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volatile uint32_t n = 1000;
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while(x--)
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{
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for (n = 0; n < 1000; ++n);
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}
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}
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static void mdelay(uint32_t x)
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{
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while(x--)
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udelay(1000);
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}
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#define RECOVERY_SIGNATURE (0x001a1a)
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#define REBOOT_SIGNATURE (0x003535)
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#define UNMSAK_SIGNATURE (0x7c0000)//do not use these bits
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void wdt_start_count(int msecs)
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{
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int time = BOARD_RTC_CLK / 64 * msecs / 1000;
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if(time > 65535)
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time = 65535;
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writel(1 << 16,TCU_BASE + TCU_TSCR);
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writel(0,WDT_BASE + WDT_TCNT); //counter
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writel(time,WDT_BASE + WDT_TDR); //data
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writel((3<<3 | 1<<1),WDT_BASE + WDT_TCSR);
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writel(0,WDT_BASE + WDT_TCER);
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writel(1,WDT_BASE + WDT_TCER);
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}
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void wdt_stop_count(void)
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{
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writel(1 << 16,TCU_BASE + TCU_TSCR);
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writel(0,WDT_BASE + WDT_TCNT); //counter
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writel(65535,WDT_BASE + WDT_TDR); //data
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writel(1 << 16,TCU_BASE + TCU_TSSR);
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}
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void wdt_clear(void)
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{
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writel(0,WDT_BASE + WDT_TCNT);
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}
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/*
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* Function: Keep power for CPU core when reset.
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* So that EPC, tcsm and so on can maintain it's status after reset-key pressed.
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*/
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static int inline reset_keep_power(void)
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{
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rtc_write_reg(RTC_BASE + RTC_PWRONCR, rtc_read_reg(RTC_BASE + RTC_PWRONCR) & ~(1 << 0));
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return 0;
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}
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void x1000_hibernate(void)
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{
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uint32_t rtc_rtccr;
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rt_base_t level;
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wdt_stop_count();
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level = rt_hw_interrupt_disable();
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/* Set minimum wakeup_n pin low-level assertion time for wakeup: 1000ms */
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rtc_write_reg(RTC_BASE + RTC_HWFCR, HWFCR_WAIT_TIME(1000));
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/* Set reset pin low-level assertion time after wakeup: must > 60ms */
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rtc_write_reg(RTC_BASE + RTC_HRCR, HRCR_WAIT_TIME(125));
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/* clear wakeup status register */
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rtc_write_reg(RTC_BASE + RTC_HWRSR, 0x0);
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rtc_write_reg(RTC_BASE + RTC_HWCR, 0x8);
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/* Put CPU to hibernate mode */
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rtc_write_reg(RTC_BASE + RTC_HCR, 0x1);
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/*poweroff the pmu*/
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// jz_notifier_call(NOTEFY_PROI_HIGH, JZ_POST_HIBERNATION, NULL);
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rtc_rtccr = rtc_read_reg(RTC_BASE + RTC_RTCCR);
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rtc_rtccr |= 0x1 << 0;
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rtc_write_reg(RTC_BASE + RTC_RTCCR,rtc_rtccr);
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mdelay(200);
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while(1)
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{
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rt_kprintf("%s:We should NOT come here.%08x\n",__func__, rtc_read_reg(RTC_BASE + RTC_HCR));
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}
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}
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void x1000_wdt_restart(char *command)
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{
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rt_kprintf("Restarting after 4 ms\n");
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if ((command != NULL) && !strcmp(command, "recovery"))
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{
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while (cpm_inl(CPM_CPPSR) != RECOVERY_SIGNATURE)
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{
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rt_kprintf("set RECOVERY_SIGNATURE\n");
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cpm_outl(0x5a5a, CPM_CPSPPR);
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cpm_outl(RECOVERY_SIGNATURE, CPM_CPPSR);
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cpm_outl(0x0, CPM_CPSPPR);
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udelay(100);
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}
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}
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else
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{
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//WDT...
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cpm_outl(0x5a5a, CPM_CPSPPR);
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cpm_outl(REBOOT_SIGNATURE, CPM_CPPSR);
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cpm_outl(0x0, CPM_CPSPPR);
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}
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wdt_start_count(4);
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mdelay(200);
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while(1)
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rt_kprintf("check wdt.\n");
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}
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void x1000_hibernate_restart(char *command)
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{
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rt_base_t level;
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uint32_t rtc_rtcsr,rtc_rtccr;
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level = rt_hw_interrupt_disable();
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if ((command != NULL) && !strcmp(command, "recovery"))
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{
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x1000_wdt_restart(command);
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}
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/* hibernate_restart */
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while(!(rtc_read_reg(RTC_BASE + RTC_RTCCR) & RTCCR_WRDY));
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rtc_rtcsr = rtc_read_reg(RTC_BASE + RTC_RTCSR);
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rtc_rtccr = rtc_read_reg(RTC_BASE + RTC_RTCCR);
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rtc_write_reg(RTC_RTCSAR,rtc_rtcsr + 5);
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rtc_rtccr &= ~(1 << 4 | 1 << 1);
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rtc_rtccr |= 0x3 << 2;
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rtc_write_reg(RTC_BASE + RTC_RTCCR,rtc_rtccr);
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/* Clear reset status */
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cpm_outl(0,CPM_RSR);
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/* Set minimum wakeup_n pin low-level assertion time for wakeup: 1000ms */
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rtc_write_reg(RTC_BASE + RTC_HWFCR, HWFCR_WAIT_TIME(1000));
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/* Set reset pin low-level assertion time after wakeup: must > 60ms */
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rtc_write_reg(RTC_BASE + RTC_HRCR, HRCR_WAIT_TIME(125));
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/* clear wakeup status register */
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rtc_write_reg(RTC_BASE + RTC_HWRSR, 0x0);
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rtc_write_reg(RTC_BASE + RTC_HWCR, 0x9);
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/* Put CPU to hibernate mode */
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rtc_write_reg(RTC_BASE + RTC_HCR, 0x1);
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rtc_rtccr = rtc_read_reg(RTC_BASE + RTC_RTCCR);
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rtc_rtccr |= 0x1 << 0;
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rtc_write_reg(RTC_BASE + RTC_RTCCR,rtc_rtccr);
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mdelay(200);
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while(1)
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rt_kprintf("%s:We should NOT come here.%08x\n",__func__, rtc_read_reg(RTC_BASE + RTC_HCR));
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}
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uint32_t x1000_get_last_reset(void)
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{
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return (cpm_inl(CPM_RSR) & 0x0000000F);
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}
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/* ============================wdt control proc end =============================== */
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/* ============================reset proc=================================== */
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const char *reset_command[] = {"wdt","hibernate","recovery"};
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#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
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int x1000_reset(const char *reset_cmd)
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{
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rt_base_t level;
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int command_size = 0;
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int i;
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command_size = ARRAY_SIZE(reset_command);
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for (i = 0; i < command_size; i++)
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{
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if (!strncmp(reset_cmd, reset_command[i], strlen(reset_command[i])))
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break;
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}
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if(i == command_size)
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return -RT_ERROR;
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level = rt_hw_interrupt_disable();
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switch(i)
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{
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case 0:
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x1000_wdt_restart("wdt");
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break;
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case 1:
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x1000_hibernate_restart("hibernate");
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break;
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case 2:
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x1000_wdt_restart("recovery");
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break;
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default:
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rt_kprintf("not support command %d\n", i);
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}
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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struct wdt_reset
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{
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int msecs;
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};
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static struct wdt_reset _wdt_param =
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{
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.msecs = 1000,
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};
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rt_err_t _wdt_init(rt_watchdog_t *wdt)
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{
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return RT_EOK;
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}
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rt_err_t _wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
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{
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switch (cmd)
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{
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case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
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{
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int msecs = *(int *)arg * 1000;
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if(msecs < 1000) msecs = 1000;
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if(msecs > 30000) msecs = 30000;
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_wdt_param.msecs = msecs;
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rt_kprintf("WDT timeout = %d\n",msecs);
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}
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break;
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case RT_DEVICE_CTRL_WDT_START:
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wdt_start_count(_wdt_param.msecs + 1000);
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break;
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case RT_DEVICE_CTRL_WDT_STOP:
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wdt_stop_count();
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break;
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case RT_DEVICE_CTRL_WDT_KEEPALIVE:
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wdt_clear();
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break;
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default:
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break;
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}
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return RT_EOK;
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}
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const struct rt_watchdog_ops _wdt_ops =
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{
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.init = _wdt_init,
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.control = _wdt_control
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};
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static struct rt_watchdog_device _wdt_device =
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{
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.ops = (struct rt_watchdog_ops *)&_wdt_ops,
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};
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int reboot(void)
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{
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rt_hw_cpu_reset();
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return 0;
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}
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MSH_CMD_EXPORT(reboot,reboot system...);
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int shutdown(void)
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{
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rt_hw_cpu_shutdown();
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}
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MSH_CMD_EXPORT(shutdown,shutdown system...);
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int rt_hw_wdt_init(void)
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{
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rt_hw_watchdog_register(&_wdt_device,"WDT",RT_DEVICE_FLAG_STANDALONE,&_wdt_param);
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return 0;
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}
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INIT_DEVICE_EXPORT(rt_hw_wdt_init);
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void rt_hw_cpu_reset()
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{
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/* Disable Base_board */
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drv_pmu_power_down();
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x1000_reset("wdt");
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}
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void rt_hw_cpu_shutdown()
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{
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/* Disable Base_board */
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drv_pmu_power_down();
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x1000_hibernate();
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}
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