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rtt-f030/libcpu/arm/lpc214x/startup_gcc.S

351 lines
11 KiB
ArmAsm
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import lm3s, lpc2148/lpc2478, x86/qemu, AT91SAM7S/7X, s3c44b0, STM32F103ZE bsp git-svn-id: https://rt-thread.googlecode.com/svn/trunk@4 bbd45198-f89e-11dd-88c7-29a3b14d5316
2009-07-03 07:18:14 +08:00
.extern main /* <20><><EFBFBD><EFBFBD><EFBFBD>ⲿC<E2B2BF><43><EFBFBD><EFBFBD> */
.extern __bss_beg__
.extern __bss_end__
.extern __stack_end__
.extern __data_beg__
.extern __data_end__
.extern __data+beg_src__
.extern rt_interrupt_enter
.extern rt_interrupt_leave
.extern rt_thread_switch_interrput_flag
.extern rt_interrupt_from_thread
.extern rt_interrupt_to_thread
.extern rt_hw_trap_irq
.global start
.global endless_loop
.global rt_hw_context_switch_interrupt_do
/************* Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD> *************/
.set UND_STACK_SIZE, 0x00000004
.set ABT_STACK_SIZE, 0x00000004
.set FIQ_STACK_SIZE, 0x00000004
.set IRQ_STACK_SIZE, 0x00000400
.set SVC_STACK_SIZE, 0x00000400
.set UND_Stack_Size, 0x00000004
.set ABT_Stack_Size, 0x00000004
.set FIQ_Stack_Size, 0x00000004
.set IRQ_Stack_Size, 0x00000400
.set SVC_Stack_Size, 0x00000400
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
.set MODE_USR, 0x10 /* User Mode */
.set MODE_FIQ, 0x11 /* FIQ Mode */
.set MODE_IRQ, 0x12 /* IRQ Mode */
.set MODE_SVC, 0x13 /* Supervisor Mode */
.set MODE_ABT, 0x17 /* Abort Mode */
.set MODE_UND, 0x1B /* Undefined Mode */
.set MODE_SYS, 0x1F /* System Mode */
.set MODE_USR, 0x10 /* User Mode */
.set Mode_FIQ, 0x11 /* FIQ Mode */
.set Mode_IRQ, 0x12 /* IRQ Mode */
.set Mode_SVC, 0x13 /* Supervisor Mode */
.set Mode_ABT, 0x17 /* Abort Mode */
.set Mode_UND, 0x1B /* Undefined Mode */
.set Mode_SYS, 0x1F /* System Mode */
.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
.equ I_Bit, 0x80 /* when I bit is set, IRQ is disabled */
.equ F_Bit, 0x40 /* when F bit is set, FIQ is disabled */
/* VPBDIV definitions*/
.equ VPBDIV, 0xE01FC100
.set VPBDIV_VALUE, 0x00000000
/* Phase Locked Loop (PLL) definitions*/
.equ PLL_BASE, 0xE01FC080
.equ PLLCON_OFS, 0x00
.equ PLLCFG_OFS, 0x04
.equ PLLSTAT_OFS, 0x08
.equ PLLFEED_OFS, 0x0C
.equ PLLCON_PLLE, (1<<0) /* PLL Enable */
.equ PLLCON_PLLC, (1<<1) /* PLL Connect */
.equ PLLSTAT_LOCK, (1<<10) /* PLL Lock Status */
.equ PLLCFG_MSEL, ((PLL_MUL - 1) << 0)
.equ PLLCFG_PSEL, (0x02 << 5)
.equ PLLCFG_Val, (PLLCFG_MSEL|PLLCFG_PSEL)
.equ MEMMAP, 0xE01FC040 /*Memory Mapping Control*/
/* Memory Accelerator Module (MAM) definitions*/
.equ MAM_BASE, 0xE01FC000
.equ MAMCR_OFS, 0x00
.equ MAMTIM_OFS, 0x04
.equ MAMCR_Val, 0x00000002
.equ MAMTIM_Val, 0x00000004
.equ VICIntEnClr, 0xFFFFF014
.equ VICIntSelect, 0xFFFFF00C
/************* Ŀ<><C4BF><EFBFBD><EFBFBD><EFBFBD>ý<EFBFBD><C3BD><EFBFBD> *************/
/* Setup the operating mode & stack.*/
/* --------------------------------- */
.global _start, start, _reset, reset,
.func _start,
_start:
start:
_reset:
reset:
.code 32
.align 0
/************************* PLL_SETUP **********************************/
#if (PLL_MUL>1)
ldr r0, =PLL_BASE
mov r1, #0xAA
mov r2, #0x55
/* Configure and Enable PLL */
mov r3, #PLLCFG_Val
str r3, [r0, #PLLCFG_OFS]
mov r3, #PLLCON_PLLE
str r3, [r0, #PLLCON_OFS]
str r1, [r0, #PLLFEED_OFS]
str r2, [r0, #PLLFEED_OFS]
/* Wait until PLL Locked */
PLL_Locked_loop:
ldr r3, [r0, #PLLSTAT_OFS]
ands r3, r3, #PLLSTAT_LOCK
beq PLL_Locked_loop
/* Switch to PLL Clock */
mov r3, #(PLLCON_PLLE|PLLCON_PLLC)
str r3, [r0, #PLLCON_OFS]
str r1, [r0, #PLLFEED_OFS]
str R2, [r0, #PLLFEED_OFS]
#endif
/************************* PLL_SETUP **********************************/
/************************ Setup VPBDIV ********************************/
ldr r0, =VPBDIV
ldr r1, =VPBDIV_VALUE
str r1, [r0]
/************************ Setup VPBDIV ********************************/
/************** Setup MAM **************/
ldr r0, =MAM_BASE
mov r1, #MAMTIM_Val
str r1, [r0, #MAMTIM_OFS]
mov r1, #MAMCR_Val
str r1, [r0, #MAMCR_OFS]
/************** Setup MAM **************/
/************************ setup stack *********************************/
ldr r0, .LC6 /* LC6:__stack_end__ */
msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode */
mov sp, r0
sub r0, r0, #UND_STACK_SIZE
msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
mov sp, r0
sub r0, r0, #ABT_STACK_SIZE
msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
mov sp, r0
sub r0, r0, #FIQ_STACK_SIZE
msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
mov sp, r0
sub r0, r0, #IRQ_STACK_SIZE
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
mov sp, r0
/************************ setup stack ********************************/
/************************ Clear BSS ********************************/
/* Clear BSS. */
mov a2, #0 /* Fill value */
mov fp, a2 /* Null frame pointer */
mov r7, a2 /* Null frame pointer for Thumb */
ldr r1, .LC1 /* Start of memory block */
ldr r3, .LC2 /* End of memory block */
subs r3, r3, r1 /* Length of block */
beq .end_clear_loop
mov r2, #0
.clear_loop:
strb r2, [r1], #1
subs r3, r3, #1
bgt .clear_loop
.end_clear_loop:
/* Initialise data. */
ldr r1, .LC3 /* Start of memory block */
ldr r2, .LC4 /* End of memory block */
ldr r3, .LC5
subs r3, r3, r1 /* Length of block */
beq .end_set_loop
.set_loop:
ldrb r4, [r2], #1
strb r4, [r1], #1
subs r3, r3, #1
bgt .set_loop
.end_set_loop:
mov r0, #0 /* no arguments */
mov r1, #0 /* no argv either */
bl main
endless_loop:
b endless_loop
.align 0
.LC1:
.word __bss_beg__
.LC2:
.word __bss_end__
.LC3:
.word __data_beg__
.LC4:
.word __data_beg_src__
.LC5:
.word __data_end__
.LC6:
.word __stack_end__
/*********************** END Clear BSS ******************************/
/******************** <20><>ת<EFBFBD><D7AA> main() ********************/
LDR R0, =main /* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>main()<EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ַ */
BX R0 /* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD>main() */
/******************** <20><>ת<EFBFBD><D7AA> main() ********************/
/* <20><><EFBFBD><EFBFBD>Ϊ.startup<75><70> <20><><EFBFBD><EFBFBD><EFBFBD>ӽű<D3BD><C5B1>б<EFBFBD><D0B1><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ */
.section .startup,"ax"
.code 32
.align 0
ldr pc, __start /* reset - _start */
ldr pc, _undf /* undefined - _undf */
ldr pc, _swi /* SWI - _swi */
ldr pc, _pabt /* program abort - _pabt */
ldr pc, _dabt /* data abort - _dabt */
//.word 0xB9205F80 /* Ĭ<><C4AC> 0xB9205F80 */
.word 0xB8A06F58 /* 0xB8A06F58 ȫΪ */
ldr pc, __IRQ_Handler /* IRQ - read the VIC */
ldr pc, _fiq /* FIQ - _fiq */
__start:.word _start
_undf: .word __undf /* undefined */
_swi: .word __swi /* SWI */
_pabt: .word __pabt /* program abort */
_dabt: .word __dabt /* data abort */
temp1: .word 0
__IRQ_Handler: .word IRQ_Handler
_fiq: .word __fiq /* FIQ */
__undf: b . /* undefined */
__swi : b .
__pabt: b . /* program abort */
__dabt: b . /* data abort */
__fiq : b . /* FIQ */
/* IRQ<52><51><EFBFBD><EFBFBD> */
IRQ_Handler :
stmfd sp!, {r0-r12,lr} /* <EFBFBD><EFBFBD>R0 <EFBFBD>C R12<EFBFBD><EFBFBD>LR<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD>ѹջ */
bl rt_interrupt_enter /* ֪ͨRT-Thread<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ģʽ */
bl rt_hw_trap_irq /* <EFBFBD><EFBFBD>Ӧ<EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̴<EFBFBD><EFBFBD><EFBFBD> */
bl rt_interrupt_leave /* ; ֪ͨRT-ThreadҪ<64>뿪<EFBFBD>ж<EFBFBD>ģʽ */
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>rt_thread_switch_interrput_flag<61><67><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6>е<EFBFBD><D0B5>߳<EFBFBD><DFB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
ldr r0, =rt_thread_switch_interrput_flag
ldr r1, [r0]
cmp r1, #1
beq rt_hw_context_switch_interrupt_do /* <EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD>ˣ<EFBFBD><CBA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
ldmfd sp!, {r0-r12,lr} /* <EFBFBD>ָ<EFBFBD>ջ */
subs pc, lr, #4 /* <EFBFBD><EFBFBD>IRQ<EFBFBD>з<EFBFBD><EFBFBD><EFBFBD> */
/*
* void rt_hw_context_switch_interrupt_do(rt_base_t flag)
* <EFBFBD>жϽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD>
*/
rt_hw_context_switch_interrupt_do:
mov r1, #0 /* clear flag */
/* <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD>־ */
str r1, [r0] /* */
ldmfd sp!, {r0-r12,lr}/* reload saved registers */
/* <20>Ȼָ<C8BB><D6B8><EFBFBD><EFBFBD>ж<EFBFBD><D0B6>̵߳<DFB3><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
stmfd sp!, {r0-r3} /* save r0-r3 */
/* <20><>R0 <20>C R3ѹջ<D1B9><D5BB><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD> */
mov r1, sp /* <EFBFBD>Ѵ˴<EFBFBD><EFBFBD><EFBFBD>ջֵ<EFBFBD><EFBFBD><EFBFBD>浽R1 */
add sp, sp, #16 /* restore sp */
/* <20>ָ<EFBFBD>IRQ<52><51>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IRQģʽ */
sub r2, lr, #4 /* save old task's pc to r2 */
/* <20><><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>̵߳<DFB3>PC<50><43>R2 */
mrs r3, spsr /* disable interrupt <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ǰ<EFBFBD><EFBFBD>CPSR<EFBFBD><EFBFBD>R3<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD> */
/* <20><><EFBFBD><EFBFBD>SPSR<53>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ */
orr r0, r3, #I_BIT|F_BIT
msr spsr_c, r0 /* <EFBFBD>ر<EFBFBD>SPSR<EFBFBD>е<EFBFBD>IRQ/FIQ<EFBFBD>ж<EFBFBD> */
ldr r0, =.+8 /* <EFBFBD>ѵ<EFBFBD>ǰ<EFBFBD><EFBFBD>ַ+8<EFBFBD><EFBFBD><EFBFBD>뵽R0<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> switch to interrupted task's stack */
movs pc, r0 /* <EFBFBD>˳<EFBFBD>IRQģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPSR<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>óɹ<EFBFBD><EFBFBD>ж<EFBFBD>ģʽ */
/* <EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD>IRQ<EFBFBD><EFBFBD><EFBFBD>غ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϲ<EFBFBD>û<EFBFBD>д<EFBFBD><EFBFBD><EFBFBD>
; R0<52>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>е<EFBFBD>λ<EFBFBD><CEBB>ʵ<EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>ָ<EFBFBD>
; <20><>PC<50><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <20><>ʱ
; ģʽ<C4A3>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ǰ<EFBFBD><C7B0>SVCģʽ<C4A3><CABD>
; SP<53>Ĵ<EFBFBD><C4B4><EFBFBD>Ҳ<EFBFBD><D2B2>SVCģʽ<C4A3>µ<EFBFBD>ջ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
; R1<52><31><EFBFBD><EFBFBD>IRQģʽ<C4A3>µ<EFBFBD>ջָ<D5BB><D6B8>
; R2<52><32><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>̵߳<DFB3>PC
; R3<52><33><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>̵߳<DFB3>CPSR */
stmfd sp!, {r2} /* push old task's pc */
/* <20><><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PC */
stmfd sp!, {r4-r12,lr}/* push old task's lr,r12-r4 */
/* <20><><EFBFBD><EFBFBD>R4 <20>C R12<31><32>LR<4C>Ĵ<EFBFBD><C4B4><EFBFBD> */
mov r4, r1 /* Special optimised code below */
/* R1<52><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹջR0 <20>C R3<52><33><EFBFBD><EFBFBD>ջλ<D5BB><CEBB> */
mov r5, r3 /* R3<EFBFBD>л<EFBFBD><EFBFBD><EFBFBD><EFBFBD>̵߳<EFBFBD>CPSR */
ldmfd r4!, {r0-r3} /* <EFBFBD>ָ<EFBFBD>R0 <EFBFBD>C R3 */
stmfd sp!, {r0-r3} /* push old task's r3-r0 */
/* R0 <20>C R3ѹջ<D1B9><D5BB><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>߳<EFBFBD> */
stmfd sp!, {r5} /* push old task's psr */
/* <20>л<EFBFBD><D0BB><EFBFBD><EFBFBD>߳<EFBFBD>CPSRѹջ */
mrs r4, spsr
stmfd sp!, {r4} /* push old task's spsr */
/* <20>л<EFBFBD><D0BB><EFBFBD><EFBFBD>߳<EFBFBD>SPSRѹջ */
ldr r4, =rt_interrupt_from_thread
ldr r5, [r4]
str sp, [r5] /* store sp in preempted tasks's TCB */
/* <20><><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>̵߳<DFB3>SPָ<50><D6B8> */
ldr r6, =rt_interrupt_to_thread
ldr r6, [r6]
ldr sp, [r6] /* get new task's stack pointer */
/* <20><><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>̵߳<DFB3>ջ */
ldmfd sp!, {r4} /* pop new task's spsr */
/* <20>ָ<EFBFBD>SPSR */
msr SPSR_cxsf, r4
ldmfd sp!, {r4} /* pop new task's psr */
/* <20>ָ<EFBFBD>CPSR */
msr CPSR_cxsf, r4
ldmfd sp!, {r0-r12,lr,pc} /* pop new task's r0-r12,lr & pc */
/* <20>ָ<EFBFBD>R0 <20>C R12<31><32>LR<4C><52>PC<50>Ĵ<EFBFBD><C4B4><EFBFBD> */
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܹ<EFBFBD><DCB9><EFBFBD> */
#if defined(CODE_PROTECTION)
.org 0x01FC
.word 0x87654321
#endif