107 lines
4.9 KiB
C
107 lines
4.9 KiB
C
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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
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* File Name : fsmc_nand.h
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* Author : MCD Application Team
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* Version : V2.0.3
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* Date : 09/22/2008
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* Description : Header for fsmc_nand.c file.
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********************************************************************************
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __FSMC_NAND_H
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#define __FSMC_NAND_H
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_lib.h"
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/* Exported types ------------------------------------------------------------*/
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typedef struct
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{
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u8 Maker_ID;
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u8 Device_ID;
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u8 Third_ID;
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u8 Fourth_ID;
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}NAND_IDTypeDef;
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typedef struct
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{
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u16 Zone;
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u16 Block;
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u16 Page;
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} NAND_ADDRESS;
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/* Exported constants --------------------------------------------------------*/
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/* NAND Area definition for STM3210E-EVAL Board RevD */
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#define CMD_AREA (u32)(1<<16) /* A16 = CLE high */
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#define ADDR_AREA (u32)(1<<17) /* A17 = ALE high */
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#define DATA_AREA ((u32)0x00000000)
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/* FSMC NAND memory command */
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#define NAND_CMD_AREA_A ((u8)0x00)
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#define NAND_CMD_AREA_B ((u8)0x01)
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#define NAND_CMD_AREA_C ((u8)0x50)
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#define NAND_CMD_AREA_TRUE1 ((u8)0x30)
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#define NAND_CMD_WRITE0 ((u8)0x80)
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#define NAND_CMD_WRITE_TRUE1 ((u8)0x10)
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#define NAND_CMD_ERASE0 ((u8)0x60)
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#define NAND_CMD_ERASE1 ((u8)0xD0)
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#define NAND_CMD_READID ((u8)0x90)
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#define NAND_CMD_STATUS ((u8)0x70)
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#define NAND_CMD_LOCK_STATUS ((u8)0x7A)
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#define NAND_CMD_RESET ((u8)0xFF)
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/* NAND memory status */
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#define NAND_VALID_ADDRESS ((u32)0x00000100)
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#define NAND_INVALID_ADDRESS ((u32)0x00000200)
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#define NAND_TIMEOUT_ERROR ((u32)0x00000400)
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#define NAND_BUSY ((u32)0x00000000)
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#define NAND_ERROR ((u32)0x00000001)
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#define NAND_READY ((u32)0x00000040)
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/* FSMC NAND memory parameters */
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//#define NAND_PAGE_SIZE ((u16)0x0200) /* 512 bytes per page w/o Spare Area */
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//#define NAND_BLOCK_SIZE ((u16)0x0020) /* 32x512 bytes pages per block */
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//#define NAND_ZONE_SIZE ((u16)0x0400) /* 1024 Block per zone */
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//#define NAND_SPARE_AREA_SIZE ((u16)0x0010) /* last 16 bytes as spare area */
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//#define NAND_MAX_ZONE ((u16)0x0004) /* 4 zones of 1024 block */
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/* FSMC NAND memory parameters */
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#define NAND_PAGE_SIZE ((u16)0x0800) /* 2K bytes per page w/o Spare Area */
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#define NAND_BLOCK_SIZE ((u16)0x0040) /* 64x2K bytes pages per block */
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#define NAND_ZONE_SIZE ((u16)0x0400) /* 1024 Block per zone */
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#define NAND_SPARE_AREA_SIZE ((u16)0x0040) /* last 64 bytes as spare area */
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#define NAND_MAX_ZONE ((u16)0x0002) /* 1 zones of 2048 block */
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/* FSMC NAND memory address computation */
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#define ADDR_1st_CYCLE(ADDR) (u8)((ADDR)& 0xFF) /* 1st addressing cycle */
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#define ADDR_2nd_CYCLE(ADDR) (u8)(((ADDR)& 0xFF00) >> 8) /* 2nd addressing cycle */
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#define ADDR_3rd_CYCLE(ADDR) (u8)(((ADDR)& 0xFF0000) >> 16) /* 3rd addressing cycle */
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#define ADDR_4th_CYCLE(ADDR) (u8)(((ADDR)& 0xFF000000) >> 24) /* 4th addressing cycle */
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#define ADDR_5fh_CYCLE(ADDR) (u8)(((ADDR)& 0xFF00000000) >> 32) /* 4th addressing cycle */
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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void FSMC_NAND_Init(void);
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void FSMC_NAND_ReadID(NAND_IDTypeDef* NAND_ID);
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u32 FSMC_NAND_WriteSmallPage(u8 *pBuffer, NAND_ADDRESS Address, u32 NumPageToWrite);
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u32 FSMC_NAND_ReadSmallPage (u8 *pBuffer, NAND_ADDRESS Address, u32 NumPageToRead);
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u32 FSMC_NAND_WriteSpareArea(u8 *pBuffer, NAND_ADDRESS Address, u32 NumSpareAreaTowrite);
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u32 FSMC_NAND_ReadSpareArea(u8 *pBuffer, NAND_ADDRESS Address, u32 NumSpareAreaToRead);
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u32 FSMC_NAND_EraseBlock(NAND_ADDRESS Address);
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u32 FSMC_NAND_Reset(void);
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u32 FSMC_NAND_GetStatus(void);
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u32 FSMC_NAND_ReadStatus(void);
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u32 FSMC_NAND_AddressIncrement(NAND_ADDRESS* Address);
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#endif /* __FSMC_NAND_H */
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/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
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