109 lines
3.2 KiB
C
109 lines
3.2 KiB
C
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/*
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* File : drv_sdram.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2016 RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2016-08-20 xuzhuoyi The first version for STM32F42x
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __DRV_SDRAM_H
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#define __DRV_SDRAM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include <rtthread.h>
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#include <board.h>
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#define SDRAM_BANK_ADDR ((uint32_t)0xD0000000)
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/**
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* @brief FMC SDRAM Memory Width
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*/
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/* #define SDRAM_MEMORY_WIDTH FMC_SDMemory_Width_8b */
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#define SDRAM_MEMORY_WIDTH FMC_SDMemory_Width_16b
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/**
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* @brief FMC SDRAM CAS Latency
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*/
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/* #define SDRAM_CAS_LATENCY FMC_CAS_Latency_2 */
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#define SDRAM_CAS_LATENCY FMC_CAS_Latency_3
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/**
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* @brief FMC SDRAM Memory clock period
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*/
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#define SDCLOCK_PERIOD FMC_SDClock_Period_2 /* Default configuration used with LCD */
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/* #define SDCLOCK_PERIOD FMC_SDClock_Period_3 */
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/**
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* @brief FMC SDRAM Memory Read Burst feature
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*/
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#define SDRAM_READBURST FMC_Read_Burst_Disable /* Default configuration used with LCD */
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/* #define SDRAM_READBURST FMC_Read_Burst_Enable */
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/**
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* @brief FMC SDRAM Bank Remap
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*/
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/* #define SDRAM_BANK_REMAP */
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/**
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* @brief Uncomment the line below if you want to use user defined Delay function
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* (for precise timing), otherwise default _delay_ function defined within
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* this driver is used (less precise timing).
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*/
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/* #define USE_Delay */
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#ifdef USE_Delay
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#define __Delay Delay /* User can provide more timing precise __Delay function
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(with 10ms time base), using SysTick for example */
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#else
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#define __Delay delay /* Default __Delay function with less precise timing */
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#endif
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/**
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* @brief FMC SDRAM Mode definition register defines
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*/
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#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
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#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
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#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
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#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
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#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
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#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
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#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
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#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
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#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
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#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
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#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
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/**
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* @}
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*/
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/** @defgroup STM32429I_DISCO_SDRAM_Exported_Functions
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* @{
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*/
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void SDRAM_Init(void);
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void SDRAM_GPIOConfig(void);
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void SDRAM_InitSequence(void);
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void SDRAM_WriteBuffer(uint32_t* pBuffer, uint32_t uwWriteAddress, uint32_t uwBufferSize);
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void SDRAM_ReadBuffer(uint32_t* pBuffer, uint32_t uwReadAddress, uint32_t uwBufferSize);
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#ifdef __cplusplus
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}
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#endif
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#endif
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