339 lines
10 KiB
C
339 lines
10 KiB
C
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#include "usart.h"
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#include <serial.h>
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/*
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* Use UART1 as console output and finsh input
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* interrupt Rx and poll Tx (stream mode)
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*
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* Use UART2 with DMA Rx and poll Tx -- DMA channel 6
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* Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
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*
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* USART DMA setting on STM32
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* USART1 Tx --> DMA Channel 4
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* USART1 Rx --> DMA Channel 5
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* USART2 Tx --> DMA Channel 7
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* USART2 Rx --> DMA Channel 6
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* USART3 Tx --> DMA Channel 2
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* USART3 Rx --> DMA Channel 3
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*/
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#ifdef RT_USING_UART1
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struct stm32_serial_int_rx uart1_int_rx;
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struct stm32_serial_device uart1 =
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{
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USART1,
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&uart1_int_rx,
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RT_NULL,
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RT_NULL,
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RT_NULL
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};
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struct rt_device uart1_device;
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#endif
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#ifdef RT_USING_UART2
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struct stm32_serial_int_rx uart2_int_rx;
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struct stm32_serial_dma_rx uart2_dma_rx;
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struct stm32_serial_device uart2 =
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{
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USART2,
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&uart2_int_rx,
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&uart2_dma_rx,
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RT_NULL,
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RT_NULL
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};
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struct rt_device uart2_device;
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#endif
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#ifdef RT_USING_UART3
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struct stm32_serial_int_rx uart3_int_rx;
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struct stm32_serial_dma_tx uart3_dma_tx;
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struct stm32_serial_device uart3 =
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{
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USART3,
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&uart3_int_rx,
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RT_NULL,
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RT_NULL,
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&uart3_dma_tx
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};
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struct rt_device uart3_device;
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#endif
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#define USART1_DR_Base 0x40013804
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#define USART2_DR_Base 0x40004404
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#define USART3_DR_Base 0x40004804
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/* USART1_REMAP = 0 */
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#define UART1_GPIO_TX GPIO_Pin_9
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#define UART1_GPIO_RX GPIO_Pin_10
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#define UART1_GPIO GPIOA
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#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
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#define UART1_TX_DMA DMA1_Channel4
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#define UART1_RX_DMA DMA1_Channel5
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/* USART2_REMAP = 0 */
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#define UART2_GPIO_TX GPIO_Pin_2
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#define UART2_GPIO_RX GPIO_Pin_3
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#define UART2_GPIO GPIOA
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#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
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#define UART2_TX_DMA DMA1_Channel7
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#define UART2_RX_DMA DMA1_Channel6
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/* USART3_REMAP[1:0] = 00 */
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#define UART3_GPIO_RX GPIO_Pin_11
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#define UART3_GPIO_TX GPIO_Pin_10
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#define UART3_GPIO GPIOB
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#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
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#define UART3_TX_DMA DMA1_Channel2
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#define UART3_RX_DMA DMA1_Channel3
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static void RCC_Configuration(void)
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{
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
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#ifdef RT_USING_UART1
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/* Enable USART1 and GPIOA clocks */
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
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#endif
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#ifdef RT_USING_UART2
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/* Enable GPIOD clocks */
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
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/* Enable USART2 clock */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
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#endif
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#ifdef RT_USING_UART3
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
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/* Enable USART3 clock */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
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#endif
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#if defined (RT_USING_UART2) || defined (RT_USING_UART3)
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/* DMA clock enable */
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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#endif
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}
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static void GPIO_Configuration(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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#ifdef RT_USING_UART1
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/* Configure USART1 Rx (PA.10) as input floating */
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GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
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/* Configure USART1 Tx (PA.09) as alternate function push-pull */
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GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
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#endif
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#ifdef RT_USING_UART2
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/* Configure USART2 Rx as input floating */
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GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
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/* Configure USART2 Tx as alternate function push-pull */
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GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
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#endif
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#ifdef RT_USING_UART3
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/* Configure USART3 Rx as input floating */
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GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
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/* Configure USART3 Tx as alternate function push-pull */
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GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
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#endif
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}
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static void NVIC_Configuration(void)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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/* Configure the NVIC Preemption Priority Bits */
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0);
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#ifdef RT_USING_UART1
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/* Enable the USART1 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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#endif
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#ifdef RT_USING_UART2
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/* Enable the USART2 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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/* Enable the DMA1 Channel6 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel6_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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#endif
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#ifdef RT_USING_UART3
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/* Enable the USART3 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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/* Enable the DMA1 Channel2 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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#endif
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}
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static void DMA_Configuration(void)
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{
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#if defined(RT_USING_UART2) || defined (RT_USING_UART3)
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DMA_InitTypeDef DMA_InitStructure;
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/* fill init structure */
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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#endif
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#ifdef RT_USING_UART2
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/* DMA1 Channel4 (triggered by USART2 Rx event) Config */
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DMA_DeInit(UART2_RX_DMA);
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DMA_InitStructure.DMA_PeripheralBaseAddr = USART2_DR_Base;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
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DMA_InitStructure.DMA_BufferSize = 0;
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DMA_Init(UART2_RX_DMA, &DMA_InitStructure);
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DMA_ITConfig(UART2_RX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
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DMA_ClearFlag(DMA1_FLAG_TC4);
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#endif
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#ifdef RT_USING_UART3
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/* DMA1 Channel5 (triggered by USART3 Tx event) Config */
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DMA_DeInit(UART3_TX_DMA);
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DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
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DMA_InitStructure.DMA_BufferSize = 0;
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DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
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DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
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DMA_ClearFlag(DMA1_FLAG_TC5);
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#endif
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}
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/*
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* Init all related hardware in here
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* rt_hw_serial_init() will register all supported USART device
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*/
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void rt_hw_usart_init()
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{
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USART_InitTypeDef USART_InitStructure;
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USART_ClockInitTypeDef USART_ClockInitStructure;
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RCC_Configuration();
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GPIO_Configuration();
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NVIC_Configuration();
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DMA_Configuration();
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/* uart init */
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#ifdef RT_USING_UART1
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USART_InitStructure.USART_BaudRate = 115200;
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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USART_InitStructure.USART_Parity = USART_Parity_No;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
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USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
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USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
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USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
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USART_Init(USART1, &USART_InitStructure);
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USART_ClockInit(USART1, &USART_ClockInitStructure);
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/* register uart1 */
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rt_hw_serial_register(&uart1_device, "uart1",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
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&uart1);
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/* enable interrupt */
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USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
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#endif
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#ifdef RT_USING_UART2
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USART_InitStructure.USART_BaudRate = 115200;
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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USART_InitStructure.USART_Parity = USART_Parity_No;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
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USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
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USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
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USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
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USART_Init(USART2, &USART_InitStructure);
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USART_ClockInit(USART2, &USART_ClockInitStructure);
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uart2_dma_rx.dma_channel= UART2_RX_DMA;
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/* register uart2 */
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rt_hw_serial_register(&uart2_device, "uart2",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_DMA_RX,
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&uart2);
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/* Enable USART2 DMA Rx request */
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USART_DMACmd(USART2, USART_DMAReq_Rx , ENABLE);
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#endif
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#ifdef RT_USING_UART3
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USART_InitStructure.USART_BaudRate = 115200;
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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USART_InitStructure.USART_Parity = USART_Parity_No;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
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USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
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USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
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USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
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USART_Init(USART3, &USART_InitStructure);
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USART_ClockInit(USART3, &USART_ClockInitStructure);
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uart3_dma_tx.dma_channel= UART3_TX_DMA;
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/* register uart3 */
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rt_hw_serial_register(&uart3_device, "uart3",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX,
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&uart3);
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/* Enable USART3 DMA Tx request */
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USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE);
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||
|
|
|
||
|
|
/* enable interrupt */
|
||
|
|
USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
|
||
|
|
#endif
|
||
|
|
}
|